reorg

romimages/RON_VT5259A/crt0.S

@@ -23,22 +23,22 @@
  	.text
 	.code16
 
-#include "intel_start32.S"
+#include <cpu/p5/start32.inc>
 
 /* turn on serial */
-#include "VIA_VT82C686A.S"
+#include <southbridge/via/vt82c686/setup_serial.inc>
 
-#include "serial.S"
+#include <pc80/serial.inc>
 
 	TTYS0_TX_STRING($ttyS0_test)
 	
 	/* initialize the RAM */
 	/* different for each motherboard */
 	
-#include "intel_pm133ram.S"
+#include <northbridge/via/vt8601/raminit.inc>
 
 #ifdef RAMTEST
-#include "ramtest.S"
+#include <ram/ramtest.inc>
 
 #include <cpu/p6/earlymtrr.inc>
 	mov $0x00000000, %eax

romimages/RON_WINFAST6300/Makefile

@@ -0,0 +1,159 @@
+CPUFLAGS=-DSIS630 -Di386 -Di486 -Di686 -Di586  -D__KERNEL__
+CPUFLAGS += -DINTEL_BRIDGE_CONFIG -DSIS630_NVRAM
+CPUFLAGS += -DINTEL_PPRO_MTRR  -DSIS630_KEYBOARD
+# CPUFLAGS += -DMUST_ENABLE_FLOPPY
+CPUFLAGS += -DSIS_FIXUP_FOR_FB
+CPUFLAGS += -DHAVE_FRAMEBUFFER
+CPUFLAGS += -DNEWPCI
+CPUFLAGS += -DENABLE_FIXED_AND_VARIABLE_MTRRS
+CPUFLAGS += -DINBUF_COPY
+CPUFLAGS += -DUSE_DOC_MIL
+CPUFLAGS += -DCMD_LINE='"root=/dev/nftla1 single"'
+
+LINUXPATH=/usr/src/linux-2.4.0/lobos
+LINUX=$(LINUXPATH)/vmlinux
+
+TOP=../..
+INCLUDES=-I $(TOP)/src/include 
+CFLAGS=$(INCLUDES) -O2 $(CPUFLAGS) -Ilinux/include -Wall
+
+OBJECTS=crt0.o hardwaremain.o linuxbiosmain.o 
+OBJECTS += mainboard.o mtrr.o subr.o fill_inbuf.o params.o
+OBJECTS += southbridge.o northbridge.o
+#OBJECTS += pci.o
+OBJECTS += printk.o vsprintf.o
+OBJECTS += newpci.o linuxpci.o
+OBJECTS += cpuid.o 
+OBJECTS += irq_tables.o
+OBJECTS += serial_subr.o
+OBJECTS += mpspec.o
+OBJECTS += microcode.o
+OBJECTS += keyboard.o
+LINUX=/usr/src/linux-2.4.0/lobos
+
+LINK = ld -T ldscript.ld -o $@ $(OBJECTS)
+CC=cc $(CFLAGS)
+CCASM=cc -I$(TOP)/chip/intel $(CFLAGS)
+
+all: romimage
+floppy: all 
+	mcopy -o romimage a:
+# here's the problem: we shouldn't assume we come up with more than 
+# 64K of FLASH up. SO we need a working linuxbios at the tail, and it will
+# enable all flash and then gunzip the linuxbios. As a result, 
+# we need the vmlinux.bin.gz padded out and then cat the linuxbios.rom
+# at then end. We always copy it to /tmp so that a waiting root shell 
+# can put it on the floppy (see ROOTDOIT)
+romimage: linuxbios.rom vmlinux.bin.gz.block
+	cat vmlinux.bin.gz.block linuxbios.rom > romimage
+	cp romimage /tmp
+
+linuxbios.rom: linuxbios.strip mkrom 
+	./mkrom -s 64 -f -o linuxbios.rom linuxbios.strip
+
+linuxbios.strip: linuxbios
+	objcopy -O binary -R .note -R .comment -S linuxbios linuxbios.strip
+
+linuxbios: $(OBJECTS) vmlinux.bin.gz
+	@rm -f biosobject
+	$(LINK) 
+	nm -n linuxbios > linuxbios.map
+
+# crt0 actually includes .inc files. 
+# For self-documenting purposes, we put the FULL PATH of the 
+# .inc files (relative to $TOP/src) in crt0.S. 
+# So, for example, earlymtrr.inc is included as cpu/p6/earlymtrr.inc
+# To make this work, add the extra -I $(TOP)/src here. 
+crt0.s: crt0.S 
+	$(CCASM) -I $(TOP)/src -E crt0.S > crt0.s
+
+crt0.o : crt0.s
+	$(CCASM) -c crt0.s
+
+mkrom: $(TOP)/mkrom/mkrom.c
+	cc -o mkrom $<
+
+linuxbiosmain.o: $(TOP)/src/lib/linuxbiosmain.c
+	cc $(CFLAGS) -c $<
+
+mainboard.o: $(TOP)/src/mainboard/leadtek/winfast6300/mainboard.c
+	cc $(CFLAGS) -c $<
+
+fill_inbuf.o: $(TOP)/src/lib/fill_inbuf.c
+	cc $(CFLAGS) -c $<
+
+params.o: $(TOP)/src/lib/params.c
+	cc $(CFLAGS) $(LINUXINCLUDE) -c $<
+
+hardwaremain.o: $(TOP)/src/lib/hardwaremain.c
+	cc $(CFLAGS) -c $<
+
+southbridge.o: $(TOP)/src/northsouthbridge/sis/630/southbridge.c
+	cc $(CFLAGS) -c $<
+
+northbridge.o: $(TOP)/src/northsouthbridge/sis/630/northbridge.c
+	cc $(CFLAGS) -c $<
+
+pci.o:  $(TOP)/src/lib/pci.c
+	cc $(CFLAGS) -c $<
+
+
+irq_tables.o: $(TOP)/src/mainboard/leadtek/winfast6300/irq_tables.c
+	cc $(CFLAGS) -o $@ -c $<
+
+mtrr.o: $(TOP)/src/cpu/p6/mtrr.c
+	cc $(CFLAGS) -c $<
+
+subr.o: $(TOP)/src/lib/subr.c
+	cc $(CFLAGS) -c $<
+
+keyboard.o: $(TOP)/src/pc80/keyboard.c
+	cc $(CFLAGS) -c $<
+
+cpuid.o: $(TOP)/src/cpu/p5/cpuid.c
+	cc $(CFLAGS) -c $<
+
+mpspec.o: $(TOP)/src/cpu/p6/mpspec.c
+	$(CC) $(CFLAGS) -c $<
+
+microcode.o: $(TOP)/src/cpu/p6/microcode.c
+	$(CC) $(CFLAGS) -c $<
+
+serial_subr.o: $(TOP)/chip/intel/serial_subr.c
+	cc $(CFLAGS) -c $<
+
+printk.o: $(TOP)/lib/printk.c
+	cc $(CFLAGS) -c $<
+
+vsprintf.o: $(TOP)/lib/vsprintf.c
+	cc $(CFLAGS) -c $<
+
+newpci.o: $(TOP)/lib/newpci.c
+	cc $(CFLAGS) -c $<
+
+linuxpci.o: $(TOP)/lib/linuxpci.c
+	cc $(CFLAGS) -c $<
+
+vmlinux.bin.gz.block: vmlinux.bin.gz
+	dd conv=sync bs=448k if=vmlinux.bin.gz of=vmlinux.bin.gz.block
+vmlinux.bin.gz: vmlinux.bin
+	gzip -f -3 vmlinux.bin 
+
+vmlinux.bin: $(LINUX)/vmlinux
+	objcopy -O binary -R .note -R .comment -S $< vmlinux.bin
+
+alltags: 
+	gctags ../inflate/*.c ../../lib/*.c ../../chip/intel/*.c
+	etags ../inflate/*.c ../../lib/*.c ../../chip/intel/*.c
+
+
+clean:: 
+	rm -f linuxbios.* vmlinux.* *.o mkrom xa? *~ linuxbios romimage crt0.s
+	rm -f a.out *.s *.l
+	rm -f TAGS tags
+
+
+
+
+
+

romimages/RON_WINFAST6300/crt0.S

@@ -0,0 +1,85 @@
+/*
+ * $ $
+ *
+ */
+
+#include <asm.h>
+#include <intel.h>
+
+#include <pciconf.h>
+#include <northsouthbridge/sis/630/param.h>
+/*
+ * This is the entry code (the mkrom(8) utility makes a jumpvector
+ * to this adddess. 
+ *
+ * When we get here we are in x86 real mode.
+ *
+ *	%cs	= 0xf000	%ip	= 0x0000
+ *	%ds	= 0x0000	%es	= 0x0000
+ *	%dx	= 0x0yxx	(y = 3 for i386, 5 for pentium, 6 for P6,
+ *					where x is undefined)
+ *	%fl	= 0x0002
+ */
+ 	.text
+	.code16
+
+#include <cpu/p5/start32.inc>
+
+	/* initialize the RAM */
+	/* different for each motherboard */
+#include <northsouthbridge/sis/630/raminit.inc>
+
+/*
+ *	Copy data into RAM and clear the BSS. Since these segments
+ *	isn't really that big we just copy/clear using bytes, not
+ *	double words.
+ */
+	intel_chip_post_macro(0x11)		/* post 11 */
+
+	cld				/* clear direction flag */
+
+	/* copy data segment from FLASH ROM to RAM */
+	leal	EXT(_ldata), %esi
+	leal	EXT(_data), %edi
+	movl	$EXT(_eldata), %ecx
+	subl	%esi, %ecx
+	jz	.Lnodata		/* should not happen */
+	rep
+	movsb
+.Lnodata:
+	intel_chip_post_macro(0x12)		/* post 12 */
+	
+	/** clear stack */
+	xorl	%edi, %edi
+	movl	$_PDATABASE, %ecx
+	xorl	%eax, %eax
+	rep
+	stosb
+
+	/** clear bss */
+	leal	EXT(_bss), %edi
+	movl	$EXT(_ebss), %ecx
+	subl	%edi, %ecx
+	jz	.Lnobss
+	xorl	%eax, %eax
+	rep
+	stosb
+.Lnobss:
+	
+/*
+ *	Now we are finished. Memory is up, data is copied and
+ *	bss is cleared.   Now we call the ``main´´ routine and
+ *	let it do the rest.
+ */ 
+	intel_chip_post_macro(0xfe)	/* post fe */
+
+/* memory is up. Let's do the rest in C -- much easier. */
+
+	/* set new stack */
+	movl	$_PDATABASE, %esp
+
+	call	EXT(intel_main)
+	/*NOTREACHED*/
+.Lhlt:	hlt
+	jmp	.Lhlt
+

romimages/RON_WINFAST6300/ldscript.ld

@@ -0,0 +1,114 @@
+/*
+ * Bootstrap code for the STPC Consumer
+ * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ *
+ * $Id$
+ *
+ */
+/* oh, barf. This won't work if all you use is .o's.  -- RGM */
+
+/*
+ *	Written by Johan Rydberg, based on work by Daniel Kahlin.
+ */
+/*
+ *	We use ELF as output format. So that we can
+ *	debug the code in some form. 
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+
+/*
+ *	Memory map:
+ *
+ *	0x00000	(4*4096 bytes)	: stack
+ *	0x04000	(4096 bytes)	: private data 
+ *	0x05000			: data space
+ *	0x90000			: kernel stack
+ *	0xf0000	(64 Kbyte)	: EPROM
+ */
+MEMORY
+{
+	ram (rwx) : ORIGIN = 0x00000000, LENGTH = 128M	/* 128 MB memory is max for STPC */
+	rom (rx)  : ORIGIN = 0x000f0000, LENGTH = 128K	/* 128 K EPROM */
+}
+
+_PDATABASE	= 0x04000;
+_RAMBASE	= 0x05000;
+_KERNSTK	= 0x90000;
+
+/* should be parameterized but is not, yuck! */
+_ROMBASE	= 0x80000;
+
+/*
+ *	Entry point is not really nececary, since the mkrom(8)
+ *	tool creates a entry point that jumps to $0xc000:0x0000.
+ */
+/* baloney, but ... RGM*/
+ENTRY(_start)
+
+SECTIONS
+{
+	/*
+	 * First we place the code and read only data (typically const declared).
+	 * This get placed in rom.
+	 */
+	.text _ROMBASE : {
+		_text = .;
+		*(.text);
+		*(.rodata);
+		_etext = .;
+	}
+
+	_pdata = .;
+
+/*
+	.pdata _PDATABASE : AT ( LOADADDR(.text) + SIZEOF(.text) +  
+					SIZEOF(.rodata)) {
+ */
+	.pdata _PDATABASE : AT ( _etext ) {
+		*(.pdata);
+	}
+
+	_epdata = LOADADDR(.pdata) + SIZEOF(.pdata);
+
+	/*
+	 * After the code we place initialized data (typically initialized
+	 * global variables). This gets copied into ram by startup code.
+	 * __data_start and __data_end shows where in ram this should be placed,
+	 * whereas __data_loadstart and __data_loadend shows where in rom to
+	 * copy from.
+	 */
+	.data _RAMBASE : AT ( LOADADDR(.pdata) + SIZEOF(.pdata) ) {
+		_data = .;
+		*(.data)
+		*(.sdata)
+		*(.sdata2)
+		*(.got)
+		_edata = .;
+	}
+    
+	_ldata	= LOADADDR(.data);
+	_eldata	= LOADADDR(.data) + SIZEOF(.data);
+ 	
+	/*
+	 * bss does not contain data, it is just a space that should be zero
+	 * initialized on startup. (typically uninitialized global variables)
+	 * crt0.S fills between __bss_start and __bss_end with zeroes.
+	 */
+	.bss ( ADDR(.data) + SIZEOF(.data) ) : {
+		_bss = .;
+		*(.bss)
+		*(.sbss)
+		*(COMMON)
+		_ebss = .;
+		_heap = .;
+	}
+}
+
+/*
+ *	This provides the start and end address for the whole image 
+ */
+_image	= LOADADDR(.text);
+_eimage	= LOADADDR(.data) + SIZEOF(.data);
+
+/* EOF */

src/lib/subr.c

@@ -241,7 +241,7 @@ void intel_check_irq_routing_table(void)
 		sum += addr[i];
 
 	printk(KERN_DEBUG "%s:%6d:%s() - "
-	       "irq_routing_table located at: 0x%08x\n",
+	       "irq_routing_table located at: 0x%p\n",
 	       __FILE__, __LINE__, __FUNCTION__, addr);
 
 	sum = (unsigned char)(rt->checksum-sum);

src/northsouthbridge/sis/630/northbridge.c

@@ -12,10 +12,11 @@ static char rcsid[] =
 
 
 #include <printk.h>
-#include <intel_conf.h>
+#include <pciconf.h>
-#include <intel_subr.h>
+#include <subr.h>
-#include <lbpci.h>
+#include <pci.h>
-#include <sis630.h>
+#include <pci_ids.h>
+#include <northsouthbridge/sis/630/param.h>
 
 /* these functions query the hardware to figure out how much ram is in
  * the machine. They then place that information in the parameter block. 
@@ -27,7 +28,7 @@ static char rcsid[] =
  */
 
 /* table for calculate the DRAM size, the unit is Mega Bytes */
-const static ramsizes[16] =
+const static int ramsizes[16] =
 {
 	8, 32, 32, 64, 16, 64, 64, 128,
 	32, 128, 128, 256, 16, 256, 256, 512
@@ -94,11 +95,11 @@ unsigned long sizeram()
 
 #ifdef HAVE_FRAMEBUFFER
 
-void intel_framebuffer_on()
+void framebuffer_on()
 {
 	unsigned long devfn = PCI_DEVFN(0, 0);
-	unsigned int bus = 0;
+	//	unsigned int bus = 0;
-	u8 dramstatus;
+	//	u8 dramstatus;
 	u32 command;
 
 #if 0
@@ -121,12 +122,6 @@ void intel_framebuffer_on()
 
 #endif	/* HAVE_FRAMEBUFFER */
 
-// mainboard fixup. 
-
-void mainboard_fixup()
-{
-}
-
 #define RTABLE_DEST 0xf0000
 
 void copy_irq_routing_table(void)

src/northsouthbridge/sis/630/southbridge.c

@@ -12,10 +12,11 @@ static char rcsid[] =
 
 
 #include <printk.h>
-#include <intel_conf.h>
+#include <pciconf.h>
-#include <intel_subr.h>
+#include <subr.h>
-#include <lbpci.h>
+#include <pci.h>
-#include <sis630.h>
+#include <pci_ids.h>
+#include <northsouthbridge/sis/630/param.h>
 
 void keyboard_on()
 {

src/ram/ramtest.inc

@@ -0,0 +1,131 @@
+
+	/*
+	 * This is much more of a "Is my SDRAM properly configured?"
+	 * test than a "Is my SDRAM faulty?" test.  Not all bits
+	 * are tested.   -Tyson
+	 */
+	
+	jmp	rt_skip
+
+rt_test:	.string "Testing SDRAM : "
+rt_fill:	.string "SDRAM fill:\r\n"
+rt_verify:	.string "SDRAM verify:\r\n"
+rt_toomany:	.string "Too many errors.\r\n"
+rt_done:	.string "Done.\r\n"
+	
+ramtest:
+#ifdef RAMTEST
+	mov %eax, %esi
+	mov %ebx, %edi
+	mov %esp, %ebp
+
+#ifdef SERIAL_CONSOLE
+	TTYS0_TX_STRING($rt_test)
+	TTYS0_TX_HEX32(%esi)
+	TTYS0_TX_CHAR($'-')
+	TTYS0_TX_HEX32(%edi)
+	TTYS0_TX_CHAR($'\r')
+	TTYS0_TX_CHAR($'\n')
+
+	/* ============== Fill ram block ==== */
+
+	TTYS0_TX_STRING($rt_fill)
+#endif
+
+	mov %esi, %ebx
+1:
+	cmp $0, %bx
+	jne 2f
+
+#ifdef SERIAL_CONSOLE
+	/* Display address being filled */
+	/* TTYS0_TX_HEX32(arg) will overwrite %ebx with arg */
+	
+	TTYS0_TX_HEX32(%ebx)
+	TTYS0_TX_CHAR($'\r')
+#endif
+2:
+	mov %ebx, (%ebx)
+	add $4, %ebx
+	cmp %edi, %ebx
+	jl 1b
+
+#ifdef SERIAL_CONSOLE
+	/* Display final address */
+
+	TTYS0_TX_HEX32(%edi)
+	TTYS0_TX_CHAR($'\r')
+	TTYS0_TX_CHAR($'\n')
+
+	/* ========= Verify ram block ========== */
+
+	TTYS0_TX_STRING($rt_verify)
+#endif	
+	mov %esi, %ebx
+
+1:
+	cmp $0, %bx
+	jne 2f
+
+#ifdef SERIAL_CONSOLE
+	/* Display address being tested */
+
+	TTYS0_TX_HEX32(%ebx)
+	TTYS0_TX_CHAR($'\r')
+#endif
+
+2:
+	cmp %ebx, (%ebx)
+	jne 4f
+3:
+	add $4, %ebx
+	cmp %edi, %ebx
+	jl 1b
+
+#ifdef SERIAL_CONSOLE
+	/* Display final address */
+
+	TTYS0_TX_HEX32(%edi)
+	TTYS0_TX_CHAR($'\r')
+	TTYS0_TX_CHAR($'\n')
+#endif
+	jmp 6f
+
+4:
+#ifdef SERIAL_CONSOLE
+	/* Display address with error */
+
+	TTYS0_TX_HEX32(%ebx)
+	TTYS0_TX_CHAR($':')
+
+	/* Display data in address with error */
+
+	/* TTYS0_TX_HEX32(arg) will overwrite %ebx with arg */
+
+	mov %ebx, %esi
+	mov 0(%ebx), %eax
+	TTYS0_TX_HEX32(%eax)
+	mov %esi, %ebx
+
+	TTYS0_TX_CHAR($'\r')
+	TTYS0_TX_CHAR($'\n')
+#endif
+	sub $1, %ecx
+	jz 5f
+	jmp 3b
+5:	
+#ifdef SERIAL_CONSOLE
+	TTYS0_TX_STRING($rt_toomany)
+#endif
+	intel_chip_post_macro(0xf1)
+	jmp	.Lhlt
+
+6:
+#ifdef SERIAL_CONSOLE
+	TTYS0_TX_STRING($rt_done)
+#endif
+	mov %ebp, %esp
+#endif
+	RETSP
+
+rt_skip: