diff --git a/src/mainboard/via/epia-m/Config b/src/mainboard/via/epia-m/Config new file mode 100644 index 0000000000..91ad4c7bdf --- /dev/null +++ b/src/mainboard/via/epia-m/Config @@ -0,0 +1,47 @@ +arch i386 +mainboardinit cpu/i386/entry16.inc +mainboardinit cpu/i386/entry32.inc +ldscript cpu/i386/entry16.lds +ldscript cpu/i386/entry32.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + +mainboardinit superio/via/vt1211/setup_serial.inc +mainboardinit pc80/serial.inc +mainboardinit arch/i386/lib/console.inc +# mainboardinit southbridge/via/vt8235/setup_ide.inc +# mainboardinit southbridge/via/vt8235/setup_ethernet.inc +mainboardinit mainboard/via/epia-m/dumpdev.inc +mainboardinit mainboard/via/epia-m/do_dumpdev.inc +mainboardinit southbridge/via/vt8235/setup_misc.inc +mainboardinit northbridge/via/vt8623/raminit.inc +mainboardinit mainboard/via/epia-m/do_dumpdev.inc +# mainboardinit ram/dump_northbridge.inc +# mainboardinit mainboard/via/epia-m/do_dumpnorth.inc +# mainboardinit ram/ramtest.inc +# mainboardinit mainboard/via/epia-m/do_ramtest.inc +# option RAM_TEST=1 + +northbridge via/vt8623 +southbridge via/vt8235 +mainboardinit cpu/c3/premtrr.inc +mainboardinit cpu/p6/earlymtrr.inc + +option ENABLE_FIXED_AND_VARIABLE_MTRRS=1 +option FINAL_MAINBOARD_FIXUP=1 +option HAVE_PIRQ_TABLE=1 +option SUPERIO_DEVFN=0x88 +option ENABLE_VT8235_LAN=1 +option ENABLE_VT8235_USB=1 +option ENABLE_IDE_NATIVE_MODE=0 + +object irq_tables.o +object mainboard.o + +keyboard pc80 +cpu p5 +cpu p6 + +option MAINBOARD_PART_NUMBER=EPIA-M +option MAINBOARD_VENDOR=VIA + diff --git a/src/mainboard/via/epia-m/README b/src/mainboard/via/epia-m/README new file mode 100644 index 0000000000..d18ef73df3 --- /dev/null +++ b/src/mainboard/via/epia-m/README @@ -0,0 +1,5 @@ +To enable flash write, + +$ setpci -s 0:11.0 40.b=54 + +-Andrew diff --git a/src/mainboard/via/epia-m/do_dumpdev.inc b/src/mainboard/via/epia-m/do_dumpdev.inc new file mode 100644 index 0000000000..6526381a40 --- /dev/null +++ b/src/mainboard/via/epia-m/do_dumpdev.inc @@ -0,0 +1,8 @@ + movl $0x0, %ecx + CALLSP(dumpdev) + + movl $CONFIG_ADDR(0,0x88,0), %ecx + CALLSP(dumpdev) + + movl $CONFIG_ADDR(0,0x89,0), %ecx + CALLSP(dumpdev) diff --git a/src/mainboard/via/epia-m/do_dumpnorth.inc b/src/mainboard/via/epia-m/do_dumpnorth.inc new file mode 100644 index 0000000000..abed7e6391 --- /dev/null +++ b/src/mainboard/via/epia-m/do_dumpnorth.inc @@ -0,0 +1 @@ + CALLSP(dumpnorth) diff --git a/src/mainboard/via/epia-m/do_ramtest.inc b/src/mainboard/via/epia-m/do_ramtest.inc new file mode 100644 index 0000000000..e22381e142 --- /dev/null +++ b/src/mainboard/via/epia-m/do_ramtest.inc @@ -0,0 +1,5 @@ + mov $0x00000000, %eax + mov $0x0009ffff, %ebx + mov $16, %ecx + + CALLSP(ramtest) diff --git a/src/mainboard/via/epia-m/dumpdev.inc b/src/mainboard/via/epia-m/dumpdev.inc new file mode 100644 index 0000000000..dea330900a --- /dev/null +++ b/src/mainboard/via/epia-m/dumpdev.inc @@ -0,0 +1,65 @@ + /* Dump the first 64 longs for devfn 0, bus 0 + * i.e. the north bridge. + */ + +#define CS_WRITE_BYTE(addr, byte) \ + movl $addr, %eax ; \ + movl $byte, %edx ; \ + PCI_WRITE_CONFIG_BYTE + +#define CS_WRITE_WORD(addr, word) \ + movl $addr, %eax ; \ + movl $word, %ecx ; \ + PCI_WRITE_CONFIG_WORD + +#define CS_WRITE_LONG(addr, dword) \ + movl $addr, %eax ; \ + movl $dword, %ecx ; \ + PCI_WRITE_CONFIG_DWORD + +#define DEVFN(device, function) (((device) << 3) + (function)) +#ifndef CONFIG_ADDR +#define CONFIG_ADDR(bus,devfn,where) (((bus) << 16) | ((devfn) << 8) | (where)) +#endif + + jmp dumpdev_skip + .section ".rom.data" + +dd_banner: .string "dump device: " +dd_ret: .string "\r\n" +dd_done: .string "Done.\r\n" +dd_before: .string "Before setting values: \r\n" +dd_after: .string "After setting values: \r\n" + .previous + +# expects device devfn in %ecx + +dumpdev: + mov %esp, %ebp + CONSOLE_INFO_TX_STRING($dd_banner) + CONSOLE_INFO_TX_HEX32(%ecx) + CONSOLE_INFO_TX_STRING($dd_ret) +# xorl %ecx, %ecx +1: + CONSOLE_INFO_TX_HEX8(%cl) + CONSOLE_INFO_TX_CHAR($':') + CONSOLE_INFO_TX_CHAR($' ') + +2: + movl %ecx, %eax + PCI_READ_CONFIG_BYTE + CONSOLE_INFO_TX_HEX8(%al) + CONSOLE_INFO_TX_CHAR($' ') + + incl %ecx + testb $0xf, %cl + jnz 2b + + CONSOLE_INFO_TX_CHAR($'\r') + CONSOLE_INFO_TX_CHAR($'\n') + cmpb $0, %cl + jne 1b + CONSOLE_INFO_TX_STRING($dd_done) + mov %ebp, %esp + RETSP +dumpdev_skip: diff --git a/src/mainboard/via/epia-m/example.config b/src/mainboard/via/epia-m/example.config new file mode 100644 index 0000000000..6e72081c87 --- /dev/null +++ b/src/mainboard/via/epia-m/example.config @@ -0,0 +1,31 @@ +# +# LinuxBIOS config file for: VIA epia mini-itx +# + +target /opt/cwlinux/buildrom/epia + +# via epia +mainboard via/epia + +# Enable Serial Console for debugging +option SERIAL_CONSOLE=1 +option TTYS0_BAUD=115200 +option DEFAULT_CONSOLE_LOGLEVEL=9 +option DEBUG=1 + +# Use 256KB Standard Flash as Normal BIOS +option RAMTEST=1 +option USE_GENERIC_ROM=1 +option STD_FLASH=1 +#option ZKERNEL_START=0xfffc0000 +option ROM_SIZE=262144 + +# payload size = 192KB +option PAYLOAD_SIZE=196608 + +# use ELF Loader to load Etherboot +option USE_ELF_BOOT=1 + +# Use Etherboot as our payload +payload /opt/cwlinux/etherboot/src/bin32/via-rhine.ebi + diff --git a/src/mainboard/via/epia-m/irq_tables.c b/src/mainboard/via/epia-m/irq_tables.c new file mode 100644 index 0000000000..63b79849c1 --- /dev/null +++ b/src/mainboard/via/epia-m/irq_tables.c @@ -0,0 +1,46 @@ +/* This file was generated by getpir.c, do not modify! + (but if you do, please run checkpir on it to verify) + Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up + + Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +*/ + +#include + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*5, /* there can be total 5 devices on the bus */ + 0, /* Where the interrupt router lies (bus) */ + 0, /* Where the interrupt router lies (dev) */ + 0x1c20, /* IRQs devoted exclusively to PCI usage */ + 0, /* Vendor */ + 0, /* Device */ + 0, /* Crap (miniport) */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ +#if 0 + 0x58, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + { + {0,0xa0, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x1, 0}, + {0,0x98, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x2, 0}, + {0,0x50, {{0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}}, 0x3, 0}, + {0,0x68, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0}, + {0,0x8, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0, 0}, + {0x50,0, {{0, 0}, {0, 0}, {0, 0}, {0, 0}}, 0, 0} + } +#else + 0xac, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + { + /* ethernet */ + {0,0x90, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x1, 0}, + /* usb */ + {0,0x80, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0}, + /* pci */ + {0,0xa0, {{0x1, 0xdeb8}, {0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}}, 0x3, 0}, + /* audio */ + {0,0x8d, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x0, 0}, + /* 1394 */ + {0,0x68, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0} + } +#endif +}; diff --git a/src/mainboard/via/epia-m/mainboard.c b/src/mainboard/via/epia-m/mainboard.c new file mode 100644 index 0000000000..578bccee36 --- /dev/null +++ b/src/mainboard/via/epia-m/mainboard.c @@ -0,0 +1,95 @@ +#include +#include +#include +#include + +#include + +//static const unsigned char usbIrqs[4] = { 11, 5, 10, 12 }; +static const unsigned char usbIrqs[4] = { 11, 12, 10, 5 }; +static const unsigned char enetIrqs[4] = { 11, 5, 10, 12 }; +//static const unsigned char slotIrqs[4] = { 10, 12, 5, 11 }; +static const unsigned char slotIrqs[4] = { 12, 10, 5, 11 }; +static const unsigned char firewireIrqs[4] = { 12, 10, 5, 11 }; + +/* + Our IDSEL mappings are as follows + PCI slot is AD31 (device 15) (00:14.0) + Southbridge is AD28 (device 12) (00:11.0) +*/ +static void pci_routing_fixup(void) +{ + struct pci_dev *dev; + + dev = pci_find_device(PCI_VENDOR_ID_VIA, 0x3177, 0); + if (dev != NULL) { + /* + * initialize PCI interupts - these assignments depend + * on the PCB routing of PINTA-D + * + * PINTA = IRQ11 + * PINTB = IRQ12 + * PINTC = IRQ10 + * PINTD = IRQ5 + */ + pci_write_config_byte(dev, 0x55, 0xb0); + pci_write_config_byte(dev, 0x56, 0xac); + pci_write_config_byte(dev, 0x57, 0x50); + + } +#if 1 + // firewire built into southbridge + printk_info("setting firewire\n"); + pci_assign_irqs(0, 0x0d, firewireIrqs); + + // Standard usb components + printk_info("setting usb\n"); + pci_assign_irqs(0, 0x10, usbIrqs); + + // Ethernet built into southbridge + printk_info("setting ethernet\n"); + pci_assign_irqs(0, 0x12, enetIrqs); + + // PCI slot + printk_info("setting pci slot\n"); + pci_assign_irqs(0, 0x14, slotIrqs); + +#endif + + printk_debug("4d0: 0x%02x\n", inb(0x4d0)); + printk_debug("4d1: 0x%02x\n", inb(0x4d1)); +#if 0 + outb(0, 0x4d0); + outb(0, 0x4d1); +#endif + printk_debug("4d0: 0x%02x\n", inb(0x4d0)); + printk_debug("4d1: 0x%02x\n", inb(0x4d1)); +} + + +void +mainboard_fixup() +{ + printk_info("Mainboard fixup\n"); + + northbridge_fixup(); + southbridge_fixup(); +} + +void +final_southbridge_fixup() +{ + printk_info("Southbridge fixup\n"); + + nvram_on(); +// keyboard_on(); + pci_routing_fixup(); +} + +void +final_mainboard_fixup() +{ + printk_info("Final mainboard fixup\n"); + final_southbridge_fixup(); +} +