diff --git a/device/device.c b/device/device.c index 921348061f..9a1c656ceb 100644 --- a/device/device.c +++ b/device/device.c @@ -66,6 +66,12 @@ struct device **last_dev_p; #define MAX_DEVICES 256 static struct device devs[MAX_DEVICES]; +/** + * the number of devices that have been allocated + */ +static int devcnt; + + /** * The device creator. * @@ -76,9 +82,9 @@ static struct device devs[MAX_DEVICES]; static struct device *new_device(void) { - static int devcnt=0; devcnt++; + printk(BIOS_SPEW, "%s: devcnt %d\n", __FUNCTION__, devcnt); /* Should we really die here? */ if (devcnt>=MAX_DEVICES) { die("Too many devices. Increase MAX_DEVICES\n"); @@ -155,6 +161,7 @@ void dev_init(void) dev->ops = c->ops; last_dev_p = &dev->next; } + devcnt = 0; } /** diff --git a/device/pci_device.c b/device/pci_device.c index 05d6c27481..9ea166c5d8 100644 --- a/device/pci_device.c +++ b/device/pci_device.c @@ -1136,9 +1136,9 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned int min_devfn, if (old_devices) { struct device *left; for (left = old_devices; left; left = left->sibling) { - printk(BIOS_ERR, "%s\n", dev_path(left)); + printk(BIOS_SPEW, "%s\n", left->dtsname); } - die("PCI: Left over static devices.\n"); + banner(BIOS_SPEW, "PCI: Left over static devices.\n"); } /* For all children that implement scan_bus() (i.e. bridges) diff --git a/mainboard/pcengines/alix1c/dts b/mainboard/pcengines/alix1c/dts index ff5da0328b..d98d5e5ba1 100644 --- a/mainboard/pcengines/alix1c/dts +++ b/mainboard/pcengines/alix1c/dts @@ -25,11 +25,16 @@ cpus { enabled; }; + apic { + /config/("northbridge/amd/geodelx/apic"); + enabled; + }; domain0 { - /config/("northbridge/amd/geodelx/dts"); + /config/("northbridge/amd/geodelx/domain"); enabled; pcidomain = "0"; device0,0 { + /config/("northbridge/amd/geodelx/pci"); enabled; pcipath = "1,0"; }; diff --git a/northbridge/amd/geodelx/apic b/northbridge/amd/geodelx/apic new file mode 100644 index 0000000000..ae30d40b79 --- /dev/null +++ b/northbridge/amd/geodelx/apic @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Ronald G. Minnich + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +{ + constructor = "geodelx_north_constructors"; + apicid = "PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LXBRIDGE"; +}; + diff --git a/northbridge/amd/geodelx/dts b/northbridge/amd/geodelx/domain similarity index 100% rename from northbridge/amd/geodelx/dts rename to northbridge/amd/geodelx/domain diff --git a/northbridge/amd/geodelx/geodelx.c b/northbridge/amd/geodelx/geodelx.c index f5a2590d10..c95912da0b 100644 --- a/northbridge/amd/geodelx/geodelx.c +++ b/northbridge/amd/geodelx/geodelx.c @@ -380,9 +380,12 @@ static struct device_operations geodelx_apic_ops = { }; /** Operations for when the northbridge is running a PCI device. */ +/** Note that phase3 scan is done in the domain, + * and MUST NOT be done here too + */ static struct device_operations geodelx_pci_ops = { .constructor = default_device_constructor, - .phase3_scan = pci_domain_scan_bus, + .phase3_scan = 0, .phase4_read_resources = pci_domain_read_resources, .phase4_set_resources = geodelx_northbridge_set_resources, .phase5_enable_resources = enable_childrens_resources, diff --git a/northbridge/amd/geodelx/pci b/northbridge/amd/geodelx/pci new file mode 100644 index 0000000000..a0332bcf24 --- /dev/null +++ b/northbridge/amd/geodelx/pci @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Ronald G. Minnich + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +{ + constructor = "geodelx_north_constructors"; + pciid = "PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LXBRIDGE"; +}; + diff --git a/northbridge/amd/geodelx/vsmsetup.c b/northbridge/amd/geodelx/vsmsetup.c index dc730a3953..1f1f5844d7 100644 --- a/northbridge/amd/geodelx/vsmsetup.c +++ b/northbridge/amd/geodelx/vsmsetup.c @@ -222,88 +222,3 @@ void do_vsmbios(void) "do_vsmbios: VSA2 VR signature not valid, install failed!\n"); } -enum { - PCIBIOS = 0x1a, - MEMSIZE = 0x12 -}; - -int pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, - unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, - unsigned long *pecx, unsigned long *peax, unsigned long *pflags); - -int handleint21(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, - unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, - unsigned long *pecx, unsigned long *peax, - unsigned long *pflags); - -/* see the vga_exit() call. until we clean this up this function will remain here */ -static int biosint(unsigned long intnumber, - unsigned long gsfs, unsigned long dses, - unsigned long edi, unsigned long esi, - unsigned long ebp, unsigned long esp, - unsigned long ebx, unsigned long edx, - unsigned long ecx, unsigned long eax, - unsigned long cs_ip, unsigned short stackflags) -{ - unsigned long ip; - unsigned long cs; - unsigned long flags; - int ret = -1; - - ip = cs_ip & 0xffff; - cs = cs_ip >> 16; - flags = stackflags; - - printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber); - printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", - eax, ebx, ecx, edx); - printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", - ebp, esp, edi, esi); - printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n", - ip, cs, flags); - printk(BIOS_DEBUG, "biosint: gs 0x%lx fs 0x%lx ds 0x%lx es 0x%lx\n", - gsfs >> 16, gsfs & 0xffff, dses >> 16, dses & 0xffff); - - // cases in a good compiler are just as good as your own tables. - switch (intnumber) { - case 0 ... 15: - // These are not BIOS service, but the CPU-generated exceptions - printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber); - if (esp < 0x1000) { - printk(BIOS_DEBUG, "Stack contents: "); - while (esp < 0x1000) { - printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *)esp); - esp += 2; - } - printk(BIOS_DEBUG, "\n"); - } - printk(BIOS_DEBUG, "biosint: Bailing out ... not now\n"); - // "longjmp" - //vga_exit(); - break; - - case PCIBIOS: - ret = pcibios(&edi, &esi, &ebp, &esp, - &ebx, &edx, &ecx, &eax, &flags); - break; - case MEMSIZE: - // who cares. - eax = 128 * 1024; - ret = 0; - break; - case 0x15: - ret = handleint21(&edi, &esi, &ebp, &esp, - &ebx, &edx, &ecx, &eax, &flags); - break; - default: - printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber); - break; - } - if (ret) - flags |= 1; // carry flags - else - flags &= ~1; - stackflags = flags; - return ret; -} - diff --git a/util/dtc/flattree.c b/util/dtc/flattree.c index 0640e05e59..356b06c065 100644 --- a/util/dtc/flattree.c +++ b/util/dtc/flattree.c @@ -551,6 +551,10 @@ static void coreboot_emit_special(FILE *e, struct node *tree) fprintf(f, "\t.id = {.type=DEVICE_ID_PCI,.u={.pci={ %s }}},\n", prop->val.val); } + if (streq(prop->name, "apicid")){ + fprintf(f, "\t.id = {.type=DEVICE_ID_APIC,.u={.pci={ %s }}},\n", + prop->val.val); + } } } /* Process the properties specified in the mainboard dts.