UPSTREAM: mainboard/google/reef: Configure SDCARD card detect pin

This configures GPIO_177 as an input pin for SDCARD card
detect. This also changes the ownership of the pin from ACPI
to GPIO driver.

Assign the sdcard card detect pin in devicetree for reef variants.

CQ-DEPEND=CL:448173
BUG=chrome-os-partner:63070
TEST=None

Change-Id: I6a146d62c0e7f6715d5b63180bfe8cd7f85dd56e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7e4d12c5b1
Original-Change-Id: Ia8aef60bd7d0ea36afb39f76fab051aa46a2ed64
Original-Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18497
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/452894

src/mainboard/google/reef/variants/baseboard/devicetree.cb

@@ -17,6 +17,9 @@ chip soc/intel/apollolake
 	# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
 	register "prt0_gpio" = "GPIO_122"
 
+	# GPIO for SD card detect
+	register "sdcard_cd_gpio" = "GPIO_177"
+
 	# EMMC TX DATA Delay 1
 	# Refer to EDS-Vol2-22.3.
 	# [14:8] steps of delay for HS400, each 125ps.

src/mainboard/google/reef/variants/baseboard/gpio.c

@@ -59,7 +59,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPIO_175, UP_20K, DEEP, NF1), /* SDCARD_D2 */
 	PAD_CFG_NF(GPIO_176, UP_20K, DEEP, NF1), /* SDCARD_D3 */
 	/* Card detect is active LOW with external pull up. */
-	PAD_CFG_NF(GPIO_177, NONE, DEEP, NF1), /* SDCARD_CD_N */
+	PAD_CFG_GPI_GPIO_DRIVER(GPIO_177, NONE, DEEP), /* SDCARD_CD_N */
 	PAD_CFG_NF(GPIO_178, UP_20K, DEEP, NF1), /* SDCARD_CMD */
 	/* CLK feedback, internal signal, needs 20K pull down */
 	PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1), /* SDCARD_CLK_FB */

src/mainboard/google/reef/variants/pyro/devicetree.cb

@@ -17,6 +17,9 @@ chip soc/intel/apollolake
 	# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
 	register "prt0_gpio" = "GPIO_122"
 
+	# GPIO for SD card detect
+	register "sdcard_cd_gpio" = "GPIO_177"
+
 	# EMMC TX DATA Delay 1
 	# Refer to EDS-Vol2-22.3.
 	# [14:8] steps of delay for HS400, each 125ps.

src/mainboard/google/reef/variants/snappy/devicetree.cb

@@ -17,6 +17,9 @@ chip soc/intel/apollolake
 	# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
 	register "prt0_gpio" = "GPIO_122"
 
+	# GPIO for SD card detect
+	register "sdcard_cd_gpio" = "GPIO_177"
+
 	# EMMC TX DATA Delay 1
 	# Refer to EDS-Vol2-22.3.
 	# [14:8] steps of delay for HS400, each 125ps.