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Fix a bunch of typos (trivial).

Browse source 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@302 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Uwe Hermann 2007-05-03 00:20:53 +00:00
parent 7666e8d31b
commit c8e549a3ff
7 changed files with 31 additions and 32 deletions
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20
device/Kconfig
View file

@ -23,7 +23,7 @@ menu "Devices"
config PCI_OPTION_ROM_RUN
bool
help
Execute PCI/AGP option roms if available. This is required to
Execute PCI/AGP option ROMs if available. This is required to
enable PCI/AGP VGA plugin cards. This option is not exposed
to the user but set by the options PCI_OPTION_ROM_RUN_VM86
and PCI_OPTION_ROM_RUN_X86EMU.
@ -32,17 +32,17 @@ choice
prompt "Execute PCI Option ROMs"
default PCI_OPTION_ROM_RUN_VM86
help
Execute PCI/AGP option roms if available. You can choose to
execute PCI option roms natively (32bit x86 system required),
in an emulator (x86emu), or ignore option rom execution
Execute PCI/AGP option ROMs if available. You can choose to
execute PCI option ROMs natively (32bit x86 system required),
in an emulator (x86emu), or ignore option ROM execution.
config PCI_OPTION_ROM_RUN_X86EMU
bool "x86emu"
select PCI_OPTION_ROM_RUN
help
If choose this option, the x86 instruction set emulator
x86emu is used to execute 16bit legacy bios option roms.
If you choose this option, the x86 instruction set emulator
x86emu is used to execute 16bit legacy BIOS option ROMs.
x86emu is slow, big and safe. All 16bit x86 code is executed
in an encapsulated environment where it can not break out.
@ -53,17 +53,17 @@ config PCI_OPTION_ROM_RUN_VM86
select PCI_OPTION_ROM_RUN
depends ARCH_X86
help
If choose this option, the virtual x86 mode "vm86" is used
to execute 16bit legacy bios option roms.
If you choose this option, the virtual x86 mode "vm86" is used
to execute 16bit legacy BIOS option ROMs.
vm86 is very small, fast, and probably a little less safe than
x86emu, since it runs option roms on the real hardware instead
x86emu, since it runs option ROMs on the real hardware instead
of an emulator.
config PCI_OPTION_ROM_RUN_NONE
bool "Disabled"
help
Do not execute PCI option roms at all.
Do not execute PCI option ROMs at all.
If you choose this option, VGA plugin cards will not be
initialized.

2
device/cardbus_device.c
View file

@ -41,7 +41,7 @@ static void cardbus_record_bridge_resource(device_t dev, resource_t moving,
resource_t min_size, unsigned int index,
unsigned long type)
{
/* Initiliaze the constraints on the current bus. */
/* Initialize the constraints on the current bus. */
struct resource *resource;
resource = 0;
if (moving) {

6
device/device.c
View file

@ -78,7 +78,7 @@ void dev_init(void)
/**
* The default constructor, which simply allocates and sets the ops pointer.
*
* Allocte a new device structure and initialize device->ops.
* Allocate a new device structure and initialize device->ops.
*
* @param constructor A pointer to a struct constructor.
* @return Pointer to the newly created device structure.
@ -502,7 +502,7 @@ void compute_allocate_resource(struct bus *bus, struct resource *bridge,
/* A PCI bridge resource does not need to be a power of two size, but
* it does have a minimum granularity. Round the size up to that
* minimum granularity so we know not to place something else at an
* address postitively decoded by the bridge.
* address positively decoded by the bridge.
*/
bridge->size = round(base, bridge->gran) - bridge->base;
@ -518,7 +518,7 @@ static void allocate_vga_resource(void)
// FIXME: This function knows too much about PCI stuff,
// it should just be an iterator/visitor.
/* FIXME: Handle the VGA pallette snooping. */
/* FIXME: Handle the VGA palette snooping. */
struct device *dev, *vga, *vga_onboard, *vga_first, *vga_last;
struct bus *bus;
bus = 0;

2
device/device_util.c
View file

@ -582,7 +582,7 @@ const char *resource_type(struct resource *resource)
/**
* Print the resource that was just stored.
*
* @param dev The device the stored resorce lives on.
* @param dev The device the stored resource lives on.
* @param resource The resource that was just stored.
*/
void report_resource_stored(struct device *dev, struct resource *resource,

8
device/hypertransport.c
View file

@ -97,7 +97,7 @@ static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
#if K8_HT_FREQ_1G_SUPPORT == 1
#if K8_REV_F_SUPPORT == 0
if (is_cpu_pre_e0()) { // Only e0 later suupport 1GHz HT.
if (is_cpu_pre_e0()) { // Only e0 later support 1GHz HT.
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
}
#endif
@ -406,7 +406,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
int ht_dev_num = 0;
#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
/* Let't record the device of last HT device, so we can set the
/* Let's record the device of last HT device, so we can set the
* unitid to HT_CHAIN_END_UNITID_BASE.
*/
unsigned int real_last_unitid;
@ -501,7 +501,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
flags |= next_unitid & 0x1f;
pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
/* Update the Unitd id in the device structure. */
/* Update the unitid in the device structure. */
static_count = 1;
for (func = dev; func; func = func->sibling) {
func->path.u.pci.devfn += (next_unitid << 3);
@ -530,7 +530,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
#endif
next_unitid += count;
/* Setup the hypetransport link. */
/* Setup the hypertransport link. */
bus->reset_needed |= ht_setup_link(&prev, dev, pos);
printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",

23
device/pci_device.c
View file

@ -357,7 +357,7 @@ static void pci_record_bridge_resource(struct device *dev, resource_t moving,
unsigned int index, unsigned long mask,
unsigned long type)
{
/* Initiliaze the constraints on the current bus. */
/* Initialize the constraints on the current bus. */
struct resource *resource;
resource = 0;
if (moving) {
@ -468,7 +468,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
return;
}
/* If the resource is substractive don't worry about it. */
/* If the resource is subtractive don't worry about it. */
if (resource->flags & IORESOURCE_SUBTRACTIVE) {
return;
}
@ -725,7 +725,7 @@ static struct device_operations *get_pci_bridge_ops(struct device *dev)
#if CONFIG_PCIX_PLUGIN_SUPPORT == 1
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
if (pos) {
printk(BIOS_DEBUG, "%s subbordinate bus PCI-X\n",
printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n",
dev_path(dev));
return &default_pcix_ops_bus;
}
@ -741,7 +741,7 @@ static struct device_operations *get_pci_bridge_ops(struct device *dev)
if ((flags >> 13) == 1) {
/* Host or Secondary Interface. */
printk(BIOS_DEBUG,
"%s subbordinate bus Hypertransport\n",
"%s subordinate bus Hypertransport\n",
dev_path(dev));
return &default_ht_ops_bus;
}
@ -756,11 +756,11 @@ static struct device_operations *get_pci_bridge_ops(struct device *dev)
case PCI_EXP_TYPE_ROOT_PORT:
case PCI_EXP_TYPE_UPSTREAM:
case PCI_EXP_TYPE_DOWNSTREAM:
printk(BIOS_DEBUG, "%s subbordinate bus PCI Express\n",
printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n",
dev_path(dev));
return &default_pciexp_ops_bus;
case PCI_EXP_TYPE_PCI_BRIDGE:
printk(BIOS_DEBUG, "%s subbordinate PCI\n",
printk(BIOS_DEBUG, "%s subordinate PCI\n",
dev_path(dev));
return &default_pci_ops_bus;
default:
@ -902,10 +902,9 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
*
* Determine the existence of a given PCI device.
*
* @param bus pointer to the bus structure
* @param devfn to look at
*
* @return The device structure for hte device (if found)
* @param bus Pointer to the bus structure.
* @param devfn A device/function number.
* @return The device structure for the device (if found)
* or the NULL if no device is found.
*/
struct device *pci_probe_dev(struct device *dev, struct bus *bus,
@ -922,7 +921,7 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
dummy.path.type = DEVICE_PATH_PCI;
dummy.path.u.pci.devfn = devfn;
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
/* Have we found somthing?
/* Have we found something?
* Some broken boards return 0 if a slot is empty.
*/
if ((id == 0xffffffff) || (id == 0x00000000) ||
@ -1189,7 +1188,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
* This function is the default scan_bus() method for PCI bridge devices.
*
* @param dev Pointer to the bridge device.
* @param max The highest bus number assgined up to now.
* @param max The highest bus number assigned up to now.
* @return The maximum bus number found, after scanning all subordinate buses.
*/
unsigned int pci_scan_bridge(struct device *dev, unsigned int max)

2
device/pnp_device.c
View file

@ -158,7 +158,7 @@ static void pnp_get_ioresource(struct device *dev, unsigned int index,
resource = new_resource(dev, index);
/* Initilize the resource. */
/* Initialize the resource. */
resource->limit = 0xffff;
resource->flags |= IORESOURCE_IO;