mb/lenvovo/*: Clean mainboard.c and devicetree

* Move board specific SPI registers to devicetree
* Remove unused headers
* Remove obsolete methods
* Fix coding style
* Fix Thinkpad L520 SPI lvscc register

Except for Thinkpad L520, no functional change has been done,
just moving stuff around.

Change-Id: I692a5632030fe2fedbe9a90f86251000f1360fb2
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/mainboard/lenovo/l520/devicetree.cb

@@ -15,8 +15,8 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_up_delay" = "0"
 	register "gpu_pch_backlight" = "0x00000000"
 
-        # Override fuse bits that hard-code the value to 666 Mhz
+	# Override fuse bits that hard-code the value to 666 Mhz
-        register "max_mem_clock_mhz" = "933"
+	register "max_mem_clock_mhz" = "933"
 
 	device cpu_cluster 0x0 on
 		chip cpu/intel/socket_rPGA989
@@ -36,14 +36,14 @@ chip northbridge/intel/sandybridge
 	end
 
 	device domain 0x0 on
-                device pci 00.0 on # Host bridge Host bridge
+		device pci 00.0 on # Host bridge Host bridge
-                        subsystemid 0x17aa 0x21dd
+			subsystemid 0x17aa 0x21dd
-                end
+		end
-                device pci 01.0 on # PCIe Bridge for discrete graphics
+		device pci 01.0 on # PCIe Bridge for discrete graphics
-                end
+		end
-                device pci 02.0 on # Internal graphics VGA controller
+		device pci 02.0 on # Internal graphics VGA controller
-                        subsystemid 0x17aa 0x21dd
+			subsystemid 0x17aa 0x21dd
-                end
+		end
 		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
 			register "c2_latency" = "0x0065"
 			register "docking_supported" = "1"
@@ -58,6 +58,10 @@ chip northbridge/intel/sandybridge
 			register "pcie_port_coalesce" = "1"
 			register "sata_interface_speed_support" = "0x3"
 			register "sata_port_map" = "0x3b"
+
+			register "spi_uvscc" = "0"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 16.0 on # Management Engine Interface 1
 				subsystemid 0x17aa 0x21dd
 			end
@@ -111,27 +115,27 @@ chip northbridge/intel/sandybridge
 					end
 				end
 				chip ec/lenovo/h8
-                                        register "config0" = "0xa7"
+					register "config0" = "0xa7"
-                                        register "config1" = "0x09"
+					register "config1" = "0x09"
-                                        register "config2" = "0xa0"
+					register "config2" = "0xa0"
-                                        register "config3" = "0xc2"
+					register "config3" = "0xc2"
 
-                                        register "beepmask0" = "0x00"
+					register "beepmask0" = "0x00"
-                                        register "beepmask1" = "0x86"
+					register "beepmask1" = "0x86"
-                                        register "has_power_management_beeps" = "0"
+					register "has_power_management_beeps" = "0"
-                                        register "event2_enable" = "0xff"
+					register "event2_enable" = "0xff"
-                                        register "event3_enable" = "0xff"
+					register "event3_enable" = "0xff"
-                                        register "event4_enable" = "0xff"
+					register "event4_enable" = "0xff"
-                                        register "event5_enable" = "0xff"
+					register "event5_enable" = "0xff"
-                                        register "event6_enable" = "0xff"
+					register "event6_enable" = "0xff"
-                                        register "event7_enable" = "0xff"
+					register "event7_enable" = "0xff"
-                                        register "event8_enable" = "0xff"
+					register "event8_enable" = "0xff"
-                                        register "event9_enable" = "0xff"
+					register "event9_enable" = "0xff"
-                                        register "eventa_enable" = "0xff"
+					register "eventa_enable" = "0xff"
-                                        register "eventb_enable" = "0xff"
+					register "eventb_enable" = "0xff"
-                                        register "eventc_enable" = "0xff"
+					register "eventc_enable" = "0xff"
-                                        register "eventd_enable" = "0xff"
+					register "eventd_enable" = "0xff"
-                                        register "evente_enable" = "0xff"
+					register "evente_enable" = "0xff"
 
 					device pnp ff.2 on # dummy
 						io 0x60 = 0x62

src/mainboard/lenovo/l520/mainboard.c

@@ -17,20 +17,13 @@
 
 #include <device/device.h>
 #include <drivers/intel/gma/int15.h>
-#include <southbridge/intel/bd82x6x/pch.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00000000;
-	RCBA32(0x38c4) = 0x00000000;
-}
-
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 void h8_mainboard_init_dock(void)

src/mainboard/lenovo/s230u/devicetree.cb

@@ -56,6 +56,10 @@ chip northbridge/intel/sandybridge
 			register "superspeed_capable_ports" = "0x0000000f"
 			register "xhci_overcurrent_mapping" = "0x00000c03"
 			register "xhci_switchable_ports" = "0x0000000f"
+
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 14.0 on # USB 3.0 Controller
 				subsystemid 0x17aa 0x2205
 			end

src/mainboard/lenovo/s230u/mainboard.c

@@ -20,7 +20,6 @@
 #include <console/console.h>
 #include <drivers/intel/gma/int15.h>
 #include <ec/acpi/ec.h>
-#include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <string.h>
 #include <smbios.h>
@@ -28,12 +27,6 @@
 
 #include <arch/acpi.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 static u8 mainboard_fill_ec_version(char *buf, u8 buf_len)
 {
 	u8 i, c;
@@ -74,7 +67,6 @@ static void mainboard_smbios_strings(
 
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
 	dev->ops->get_smbios_strings = mainboard_smbios_strings,
 
 	install_intel_vga_int15_handler(

src/mainboard/lenovo/t400/mainboard.c

@@ -13,30 +13,14 @@
  * GNU General Public License for more details.
  */
 
-#include <stdint.h>
-#include <stdlib.h>
-#include <arch/io.h>
 #include <device/device.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/keyboard.h>
-#include <ec/acpi/ec.h>
-#include <smbios.h>
-#include <string.h>
-#include <ec/lenovo/pmh7/pmh7.h>
-#include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
-#include "drivers/lenovo/lenovo.h"
-
-static void fill_ssdt(device_t device)
-{
-}
 
 static void mainboard_enable(device_t dev)
 {
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_CENTERING,
-	dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/lenovo/t420/devicetree.cb

@@ -75,6 +75,10 @@ chip northbridge/intel/sandybridge
 			register "c2_latency" = "101"  # c2 not supported
 			register "p_cnt_throttling_supported" = "1"
 
+			# device specific SPI configuration
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 16.0 off end # Management Engine Interface 1
 			device pci 16.1 off end # Management Engine Interface 2
 			device pci 16.2 off end # Management Engine IDE-R

src/mainboard/lenovo/t420/mainboard.c

@@ -17,20 +17,10 @@
 
 #include <device/device.h>
 #include <drivers/intel/gma/int15.h>
-#include <southbridge/intel/bd82x6x/pch.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	/* init spi */
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
-
 	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
 					GMA_INT15_PANEL_FIT_DEFAULT,
 					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);

src/mainboard/lenovo/t420s/devicetree.cb

@@ -75,6 +75,9 @@ chip northbridge/intel/sandybridge
 			register "c2_latency" = "101"  # c2 not supported
 			register "p_cnt_throttling_supported" = "1"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 16.0 off end # Management Engine Interface 1
 			device pci 16.1 off end # Management Engine Interface 2
 			device pci 16.2 off end # Management Engine IDE-R

src/mainboard/lenovo/t420s/mainboard.c

@@ -15,32 +15,15 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <arch/acpi.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	/* init spi */
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 void h8_mainboard_init_dock(void)

src/mainboard/lenovo/t430s/devicetree.cb

@@ -78,6 +78,9 @@ chip northbridge/intel/sandybridge
 			register "c2_latency" = "101"  # c2 not supported
 			register "p_cnt_throttling_supported" = "1"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 14.0 on
 				subsystemid 0x17aa 0x21fb
 			end # USB 3.0 Controller

src/mainboard/lenovo/t430s/mainboard.c

@@ -15,31 +15,12 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <arch/acpi.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	/* init spi */
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
-
 	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
 					GMA_INT15_PANEL_FIT_DEFAULT,
 					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);

src/mainboard/lenovo/t520/devicetree.cb

@@ -72,6 +72,9 @@ chip northbridge/intel/sandybridge
 
 			register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 16.0 on end # Management Engine Interface 1
 			device pci 16.1 off end
 			device pci 16.2 off end

src/mainboard/lenovo/t520/mainboard.c

@@ -15,42 +15,21 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <cbfs.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 /* mainboard_enable is executed as first thing after
 enumerate_buses(). */
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_PANEL_FIT_DEFAULT,
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 void h8_mainboard_init_dock (void)
 {
-	return;
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/lenovo/t530/devicetree.cb

@@ -75,6 +75,9 @@ chip northbridge/intel/sandybridge
 			register "superspeed_capable_ports" = "0xf"
 			register "xhci_overcurrent_mapping" = "0x4000201"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 14.0 on end # USB 3.0 Controller
 			device pci 16.0 on end # Management Engine Interface 1
 			device pci 16.1 off end # Management Engine Interface 2

src/mainboard/lenovo/t530/mainboard.c

@@ -15,39 +15,18 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <cbfs.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 // mainboard_enable is executed as first thing after
 // enumerate_buses().
 
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 void h8_mainboard_init_dock (void)

src/mainboard/lenovo/t60/mainboard.c

@@ -15,23 +15,16 @@
  * GNU General Public License for more details.
  */
 
-#include <console/console.h>
-#include <device/device.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <delay.h>
-#include <string.h>
 #include <device/pci_def.h>
-#include <device/pci_ops.h>
+#include <device/device.h>
 #include <ec/lenovo/pmh7/pmh7.h>
-#include <ec/acpi/ec.h>
 #include <ec/lenovo/h8/h8.h>
+#include <ec/acpi/ec.h>
 #include <northbridge/intel/i945/i945.h>
 #include <pc80/mc146818rtc.h>
-#include <arch/x86/include/arch/acpigen.h>
-#include <arch/interrupt.h>
-#include <smbios.h>
 #include <drivers/intel/gma/int15.h>
+#include <arch/acpigen.h>
+
 #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
 
 static acpi_cstate_t cst_entries[] = {
@@ -51,7 +44,9 @@ static void mainboard_init(device_t dev)
 	struct southbridge_intel_i82801gx_config *config;
 	device_t idedev;
 
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
+					GMA_INT15_PANEL_FIT_DEFAULT,
+					PANEL, 3);
 
 	/* If we're resuming from suspend, blink suspend LED */
 	if (acpi_is_wakeup_s3())

src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb

@@ -77,6 +77,9 @@ chip northbridge/intel/sandybridge
 			register "c2_latency" = "101"  # c2 not supported
 			register "p_cnt_throttling_supported" = "1"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 14.0 on
 				subsystemid 0x17aa 0x21f9
 			end # USB 3.0 Controller

src/mainboard/lenovo/x1_carbon_gen1/mainboard.c

@@ -15,33 +15,15 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <arch/acpi.h>
-#include <boot/coreboot_tables.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-	RCBA32(0x38c0) = 0x00000007;
-}
-
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/lenovo/x200/mainboard.c

@@ -13,20 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <stdint.h>
-#include <stdlib.h>
-#include <arch/io.h>
 #include <device/device.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/keyboard.h>
+#include <drivers/lenovo/lenovo.h>
-#include <ec/acpi/ec.h>
-#include <smbios.h>
-#include <string.h>
-#include <ec/lenovo/pmh7/pmh7.h>
-#include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
-#include "drivers/lenovo/lenovo.h"
 
 static void fill_ssdt(device_t device)
 {
@@ -35,7 +24,9 @@ static void fill_ssdt(device_t device)
 
 static void mainboard_enable(device_t dev)
 {
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
+					GMA_INT15_PANEL_FIT_CENTERING,
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
 
 	dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
 }

src/mainboard/lenovo/x201/mainboard.c

@@ -18,30 +18,19 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <arch/acpi.h>
 #include <arch/io.h>
-#include <delay.h>
-#include <string.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <ec/lenovo/pmh7/pmh7.h>
 #include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
 #include <northbridge/intel/nehalem/nehalem.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
 #include <pc80/mc146818rtc.h>
 #include "dock.h"
-#include <arch/x86/include/arch/acpigen.h>
 #include <drivers/intel/gma/int15.h>
-#include <arch/interrupt.h>
 #include <pc80/keyboard.h>
 #include <cpu/x86/lapic.h>
 #include <device/pci.h>
-#include <smbios.h>
+#include <drivers/lenovo/lenovo.h>
-#include "drivers/lenovo/lenovo.h"
+#include <arch/acpigen.h>
 
 static acpi_cstate_t cst_entries[] = {
 	{1, 1, 1000, {0x7f, 1, 2, {0}, 1, 0}},
@@ -112,8 +101,9 @@ static void mainboard_enable(device_t dev)
 	if (acpi_is_wakeup_s3())
 		ec_write(0x0c, 0xc7);
 
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2);
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
+					GMA_INT15_BOOT_DISPLAY_LFP, 2);
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/lenovo/x220/devicetree.cb

@@ -76,6 +76,9 @@ chip northbridge/intel/sandybridge
 			register "c2_latency" = "101"  # c2 not supported
 			register "p_cnt_throttling_supported" = "1"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 16.0 off end # Management Engine Interface 1
 			device pci 16.1 off end # Management Engine Interface 2
 			device pci 16.2 off end # Management Engine IDE-R

src/mainboard/lenovo/x220/mainboard.c

@@ -15,34 +15,18 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <arch/acpi.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 // mainboard_enable is executed as first thing after
 // enumerate_buses().
 
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 void h8_mainboard_init_dock (void)

src/mainboard/lenovo/x230/devicetree.cb

@@ -79,6 +79,9 @@ chip northbridge/intel/sandybridge
 			register "c2_latency" = "101"  # c2 not supported
 			register "p_cnt_throttling_supported" = "1"
 
+			register "spi_uvscc" = "0x2005"
+			register "spi_lvscc" = "0x2005"
+
 			device pci 14.0 on
 				subsystemid 0x17aa 0x21fa
 			end # USB 3.0 Controller

src/mainboard/lenovo/x230/mainboard.c

@@ -15,35 +15,18 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <arch/acpi.h>
-#include <boot/coreboot_tables.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <smbios.h>
-#include <device/pci.h>
-#include <pc80/keyboard.h>
 #include <ec/lenovo/h8/h8.h>
 
-static void mainboard_init(device_t dev)
-{
-	RCBA32(0x38c8) = 0x00002005;
-	RCBA32(0x38c4) = 0x00802005;
-}
-
 // mainboard_enable is executed as first thing after
 // enumerate_buses().
 
 static void mainboard_enable(device_t dev)
 {
-	dev->ops->init = mainboard_init;
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-
+					GMA_INT15_PANEL_FIT_DEFAULT,
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
 }
 
 void h8_mainboard_init_dock (void)

src/mainboard/lenovo/x60/mainboard.c

@@ -15,26 +15,17 @@
  * GNU General Public License for more details.
  */
 
-#include <console/console.h>
-#include <device/device.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <delay.h>
-#include <string.h>
 #include <device/pci_def.h>
-#include <device/pci_ops.h>
 #include <device/pci_ids.h>
-#include <arch/interrupt.h>
+#include <device/device.h>
-#include <ec/lenovo/pmh7/pmh7.h>
+#include <arch/io.h>
 #include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
 #include <northbridge/intel/i945/i945.h>
 #include <pc80/mc146818rtc.h>
 #include "dock.h"
-#include <arch/x86/include/arch/acpigen.h>
-#include <smbios.h>
 #include <drivers/intel/gma/int15.h>
-#include "drivers/lenovo/lenovo.h"
+#include <drivers/lenovo/lenovo.h>
+#include <arch/acpigen.h>
 
 #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
 
@@ -88,7 +79,9 @@ static void mainboard_init(device_t dev)
 		ec_write(0x0c, 0x88);
 	}
 
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
+					GMA_INT15_PANEL_FIT_DEFAULT,
+					PANEL, 3);
 
 	/* If we're resuming from suspend, blink suspend LED */
 	if (acpi_is_wakeup_s3())