mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
mb/lenvovo/*: Clean mainboard.c and devicetree
* Move board specific SPI registers to devicetree * Remove unused headers * Remove obsolete methods * Fix coding style * Fix Thinkpad L520 SPI lvscc register Except for Thinkpad L520, no functional change has been done, just moving stuff around. Change-Id: I692a5632030fe2fedbe9a90f86251000f1360fb2 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
parent
ac27d3688a
commit
c670a41ca7
25 changed files with 110 additions and 278 deletions
|
@ -15,8 +15,8 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_up_delay" = "0"
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register "gpu_pch_backlight" = "0x00000000"
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# Override fuse bits that hard-code the value to 666 Mhz
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register "max_mem_clock_mhz" = "933"
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# Override fuse bits that hard-code the value to 666 Mhz
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register "max_mem_clock_mhz" = "933"
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device cpu_cluster 0x0 on
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chip cpu/intel/socket_rPGA989
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@ -36,14 +36,14 @@ chip northbridge/intel/sandybridge
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end
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device domain 0x0 on
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device pci 00.0 on # Host bridge Host bridge
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subsystemid 0x17aa 0x21dd
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end
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device pci 01.0 on # PCIe Bridge for discrete graphics
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end
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device pci 02.0 on # Internal graphics VGA controller
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subsystemid 0x17aa 0x21dd
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end
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device pci 00.0 on # Host bridge Host bridge
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subsystemid 0x17aa 0x21dd
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end
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device pci 01.0 on # PCIe Bridge for discrete graphics
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end
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device pci 02.0 on # Internal graphics VGA controller
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subsystemid 0x17aa 0x21dd
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end
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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register "c2_latency" = "0x0065"
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register "docking_supported" = "1"
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@ -58,6 +58,10 @@ chip northbridge/intel/sandybridge
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register "pcie_port_coalesce" = "1"
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x3b"
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register "spi_uvscc" = "0"
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register "spi_lvscc" = "0x2005"
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device pci 16.0 on # Management Engine Interface 1
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subsystemid 0x17aa 0x21dd
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end
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@ -111,27 +115,27 @@ chip northbridge/intel/sandybridge
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end
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end
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chip ec/lenovo/h8
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register "config0" = "0xa7"
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register "config1" = "0x09"
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register "config2" = "0xa0"
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register "config3" = "0xc2"
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register "config0" = "0xa7"
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register "config1" = "0x09"
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register "config2" = "0xa0"
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register "config3" = "0xc2"
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register "beepmask0" = "0x00"
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register "beepmask1" = "0x86"
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register "has_power_management_beeps" = "0"
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register "event2_enable" = "0xff"
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register "event3_enable" = "0xff"
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register "event4_enable" = "0xff"
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register "event5_enable" = "0xff"
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register "event6_enable" = "0xff"
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register "event7_enable" = "0xff"
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register "event8_enable" = "0xff"
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register "event9_enable" = "0xff"
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register "eventa_enable" = "0xff"
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0xff"
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register "beepmask0" = "0x00"
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register "beepmask1" = "0x86"
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register "has_power_management_beeps" = "0"
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register "event2_enable" = "0xff"
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register "event3_enable" = "0xff"
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register "event4_enable" = "0xff"
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register "event5_enable" = "0xff"
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register "event6_enable" = "0xff"
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register "event7_enable" = "0xff"
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register "event8_enable" = "0xff"
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register "event9_enable" = "0xff"
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register "eventa_enable" = "0xff"
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0xff"
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device pnp ff.2 on # dummy
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io 0x60 = 0x62
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@ -17,20 +17,13 @@
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#include <device/device.h>
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#include <drivers/intel/gma/int15.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <ec/lenovo/h8/h8.h>
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static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00000000;
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RCBA32(0x38c4) = 0x00000000;
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
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GMA_INT15_PANEL_FIT_DEFAULT,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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}
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void h8_mainboard_init_dock(void)
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@ -56,6 +56,10 @@ chip northbridge/intel/sandybridge
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_overcurrent_mapping" = "0x00000c03"
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register "xhci_switchable_ports" = "0x0000000f"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 14.0 on # USB 3.0 Controller
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subsystemid 0x17aa 0x2205
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end
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@ -20,7 +20,6 @@
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <ec/acpi/ec.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <southbridge/intel/common/gpio.h>
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#include <string.h>
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#include <smbios.h>
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@ -28,12 +27,6 @@
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#include <arch/acpi.h>
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static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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}
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static u8 mainboard_fill_ec_version(char *buf, u8 buf_len)
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{
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u8 i, c;
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@ -74,7 +67,6 @@ static void mainboard_smbios_strings(
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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dev->ops->get_smbios_strings = mainboard_smbios_strings,
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install_intel_vga_int15_handler(
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@ -13,30 +13,14 @@
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <pc80/keyboard.h>
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#include <ec/acpi/ec.h>
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#include <smbios.h>
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#include <string.h>
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#include <ec/lenovo/pmh7/pmh7.h>
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#include <ec/acpi/ec.h>
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#include <ec/lenovo/h8/h8.h>
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#include "drivers/lenovo/lenovo.h"
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static void fill_ssdt(device_t device)
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{
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}
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static void mainboard_enable(device_t dev)
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{
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
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dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
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GMA_INT15_PANEL_FIT_CENTERING,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
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}
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struct chip_operations mainboard_ops = {
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register "c2_latency" = "101" # c2 not supported
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register "p_cnt_throttling_supported" = "1"
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# device specific SPI configuration
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 16.0 off end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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@ -17,20 +17,10 @@
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#include <device/device.h>
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#include <drivers/intel/gma/int15.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <ec/lenovo/h8/h8.h>
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static void mainboard_init(device_t dev)
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{
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/* init spi */
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
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GMA_INT15_PANEL_FIT_DEFAULT,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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register "c2_latency" = "101" # c2 not supported
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register "p_cnt_throttling_supported" = "1"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 16.0 off end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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@ -15,32 +15,15 @@
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <string.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <arch/acpi.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <pc80/keyboard.h>
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#include <ec/lenovo/h8/h8.h>
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static void mainboard_init(device_t dev)
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{
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/* init spi */
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
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GMA_INT15_PANEL_FIT_DEFAULT,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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}
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void h8_mainboard_init_dock(void)
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register "c2_latency" = "101" # c2 not supported
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register "p_cnt_throttling_supported" = "1"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 14.0 on
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subsystemid 0x17aa 0x21fb
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end # USB 3.0 Controller
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@ -15,31 +15,12 @@
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <string.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <arch/acpi.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <pc80/keyboard.h>
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#include <ec/lenovo/h8/h8.h>
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static void mainboard_init(device_t dev)
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{
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/* init spi */
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
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GMA_INT15_PANEL_FIT_DEFAULT,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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@ -72,6 +72,9 @@ chip northbridge/intel/sandybridge
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register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end
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device pci 16.2 off end
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@ -15,42 +15,21 @@
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <string.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <pc80/mc146818rtc.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <boot/coreboot_tables.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <cbfs.h>
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#include <pc80/keyboard.h>
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#include <ec/lenovo/h8/h8.h>
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static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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}
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/* mainboard_enable is executed as first thing after
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enumerate_buses(). */
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
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GMA_INT15_PANEL_FIT_DEFAULT,
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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}
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void h8_mainboard_init_dock (void)
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{
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return;
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}
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struct chip_operations mainboard_ops = {
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@ -75,6 +75,9 @@ chip northbridge/intel/sandybridge
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register "superspeed_capable_ports" = "0xf"
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register "xhci_overcurrent_mapping" = "0x4000201"
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 14.0 on end # USB 3.0 Controller
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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@ -15,39 +15,18 @@
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* GNU General Public License for more details.
|
||||
*/
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||||
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||||
#include <types.h>
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||||
#include <string.h>
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||||
#include <device/device.h>
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#include <device/pci_def.h>
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||||
#include <device/pci_ops.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <pc80/mc146818rtc.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <boot/coreboot_tables.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <smbios.h>
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#include <device/pci.h>
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#include <cbfs.h>
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#include <pc80/keyboard.h>
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#include <ec/lenovo/h8/h8.h>
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static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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||||
}
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// mainboard_enable is executed as first thing after
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||||
// enumerate_buses().
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static void mainboard_enable(device_t dev)
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||||
{
|
||||
dev->ops->init = mainboard_init;
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
}
|
||||
|
||||
void h8_mainboard_init_dock (void)
|
||||
|
|
|
@ -15,23 +15,16 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <arch/io.h>
|
||||
#include <delay.h>
|
||||
#include <string.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <device/pci_ops.h>
|
||||
#include <device/device.h>
|
||||
#include <ec/lenovo/pmh7/pmh7.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
#include <northbridge/intel/i945/i945.h>
|
||||
#include <pc80/mc146818rtc.h>
|
||||
#include <arch/x86/include/arch/acpigen.h>
|
||||
#include <arch/interrupt.h>
|
||||
#include <smbios.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include <arch/acpigen.h>
|
||||
|
||||
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
|
||||
|
||||
static acpi_cstate_t cst_entries[] = {
|
||||
|
@ -51,7 +44,9 @@ static void mainboard_init(device_t dev)
|
|||
struct southbridge_intel_i82801gx_config *config;
|
||||
device_t idedev;
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
PANEL, 3);
|
||||
|
||||
/* If we're resuming from suspend, blink suspend LED */
|
||||
if (acpi_is_wakeup_s3())
|
||||
|
|
|
@ -77,6 +77,9 @@ chip northbridge/intel/sandybridge
|
|||
register "c2_latency" = "101" # c2 not supported
|
||||
register "p_cnt_throttling_supported" = "1"
|
||||
|
||||
register "spi_uvscc" = "0x2005"
|
||||
register "spi_lvscc" = "0x2005"
|
||||
|
||||
device pci 14.0 on
|
||||
subsystemid 0x17aa 0x21f9
|
||||
end # USB 3.0 Controller
|
||||
|
|
|
@ -15,33 +15,15 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <types.h>
|
||||
#include <string.h>
|
||||
#include <device/device.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <device/pci_ops.h>
|
||||
#include <console/console.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <boot/coreboot_tables.h>
|
||||
#include <southbridge/intel/bd82x6x/pch.h>
|
||||
#include <smbios.h>
|
||||
#include <device/pci.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
|
||||
static void mainboard_init(device_t dev)
|
||||
{
|
||||
RCBA32(0x38c8) = 0x00002005;
|
||||
RCBA32(0x38c4) = 0x00802005;
|
||||
RCBA32(0x38c0) = 0x00000007;
|
||||
}
|
||||
|
||||
static void mainboard_enable(device_t dev)
|
||||
{
|
||||
dev->ops->init = mainboard_init;
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
}
|
||||
|
||||
struct chip_operations mainboard_ops = {
|
||||
|
|
|
@ -13,20 +13,9 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <arch/io.h>
|
||||
#include <device/device.h>
|
||||
#include <console/console.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
#include <smbios.h>
|
||||
#include <string.h>
|
||||
#include <ec/lenovo/pmh7/pmh7.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
#include "drivers/lenovo/lenovo.h"
|
||||
#include <drivers/lenovo/lenovo.h>
|
||||
|
||||
static void fill_ssdt(device_t device)
|
||||
{
|
||||
|
@ -35,7 +24,9 @@ static void fill_ssdt(device_t device)
|
|||
|
||||
static void mainboard_enable(device_t dev)
|
||||
{
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_CENTERING,
|
||||
GMA_INT15_BOOT_DISPLAY_DEFAULT, 2);
|
||||
|
||||
dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
|
||||
}
|
||||
|
|
|
@ -18,30 +18,19 @@
|
|||
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <arch/io.h>
|
||||
#include <delay.h>
|
||||
#include <string.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <device/pci_ops.h>
|
||||
#include <device/pci_ids.h>
|
||||
#include <arch/io.h>
|
||||
#include <ec/lenovo/pmh7/pmh7.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
#include <northbridge/intel/nehalem/nehalem.h>
|
||||
#include <southbridge/intel/bd82x6x/pch.h>
|
||||
|
||||
#include <pc80/mc146818rtc.h>
|
||||
#include "dock.h"
|
||||
#include <arch/x86/include/arch/acpigen.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include <arch/interrupt.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <cpu/x86/lapic.h>
|
||||
#include <device/pci.h>
|
||||
#include <smbios.h>
|
||||
#include "drivers/lenovo/lenovo.h"
|
||||
#include <drivers/lenovo/lenovo.h>
|
||||
#include <arch/acpigen.h>
|
||||
|
||||
static acpi_cstate_t cst_entries[] = {
|
||||
{1, 1, 1000, {0x7f, 1, 2, {0}, 1, 0}},
|
||||
|
@ -112,8 +101,9 @@ static void mainboard_enable(device_t dev)
|
|||
if (acpi_is_wakeup_s3())
|
||||
ec_write(0x0c, 0xc7);
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2);
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
GMA_INT15_BOOT_DISPLAY_LFP, 2);
|
||||
}
|
||||
|
||||
struct chip_operations mainboard_ops = {
|
||||
|
|
|
@ -76,6 +76,9 @@ chip northbridge/intel/sandybridge
|
|||
register "c2_latency" = "101" # c2 not supported
|
||||
register "p_cnt_throttling_supported" = "1"
|
||||
|
||||
register "spi_uvscc" = "0x2005"
|
||||
register "spi_lvscc" = "0x2005"
|
||||
|
||||
device pci 16.0 off end # Management Engine Interface 1
|
||||
device pci 16.1 off end # Management Engine Interface 2
|
||||
device pci 16.2 off end # Management Engine IDE-R
|
||||
|
|
|
@ -15,34 +15,18 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <types.h>
|
||||
#include <string.h>
|
||||
#include <device/device.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <device/pci_ops.h>
|
||||
#include <console/console.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <southbridge/intel/bd82x6x/pch.h>
|
||||
#include <smbios.h>
|
||||
#include <device/pci.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
|
||||
static void mainboard_init(device_t dev)
|
||||
{
|
||||
RCBA32(0x38c8) = 0x00002005;
|
||||
RCBA32(0x38c4) = 0x00802005;
|
||||
}
|
||||
|
||||
// mainboard_enable is executed as first thing after
|
||||
// enumerate_buses().
|
||||
|
||||
static void mainboard_enable(device_t dev)
|
||||
{
|
||||
dev->ops->init = mainboard_init;
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
}
|
||||
|
||||
void h8_mainboard_init_dock (void)
|
||||
|
|
|
@ -79,6 +79,9 @@ chip northbridge/intel/sandybridge
|
|||
register "c2_latency" = "101" # c2 not supported
|
||||
register "p_cnt_throttling_supported" = "1"
|
||||
|
||||
register "spi_uvscc" = "0x2005"
|
||||
register "spi_lvscc" = "0x2005"
|
||||
|
||||
device pci 14.0 on
|
||||
subsystemid 0x17aa 0x21fa
|
||||
end # USB 3.0 Controller
|
||||
|
|
|
@ -15,35 +15,18 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <types.h>
|
||||
#include <string.h>
|
||||
#include <device/device.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <device/pci_ops.h>
|
||||
#include <console/console.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <boot/coreboot_tables.h>
|
||||
#include <southbridge/intel/bd82x6x/pch.h>
|
||||
#include <smbios.h>
|
||||
#include <device/pci.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
|
||||
static void mainboard_init(device_t dev)
|
||||
{
|
||||
RCBA32(0x38c8) = 0x00002005;
|
||||
RCBA32(0x38c4) = 0x00802005;
|
||||
}
|
||||
|
||||
// mainboard_enable is executed as first thing after
|
||||
// enumerate_buses().
|
||||
|
||||
static void mainboard_enable(device_t dev)
|
||||
{
|
||||
dev->ops->init = mainboard_init;
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
||||
}
|
||||
|
||||
void h8_mainboard_init_dock (void)
|
||||
|
|
|
@ -15,26 +15,17 @@
|
|||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <arch/io.h>
|
||||
#include <delay.h>
|
||||
#include <string.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <device/pci_ops.h>
|
||||
#include <device/pci_ids.h>
|
||||
#include <arch/interrupt.h>
|
||||
#include <ec/lenovo/pmh7/pmh7.h>
|
||||
#include <device/device.h>
|
||||
#include <arch/io.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
#include <ec/lenovo/h8/h8.h>
|
||||
#include <northbridge/intel/i945/i945.h>
|
||||
#include <pc80/mc146818rtc.h>
|
||||
#include "dock.h"
|
||||
#include <arch/x86/include/arch/acpigen.h>
|
||||
#include <smbios.h>
|
||||
#include <drivers/intel/gma/int15.h>
|
||||
#include "drivers/lenovo/lenovo.h"
|
||||
#include <drivers/lenovo/lenovo.h>
|
||||
#include <arch/acpigen.h>
|
||||
|
||||
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
|
||||
|
||||
|
@ -88,7 +79,9 @@ static void mainboard_init(device_t dev)
|
|||
ec_write(0x0c, 0x88);
|
||||
}
|
||||
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);
|
||||
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
||||
GMA_INT15_PANEL_FIT_DEFAULT,
|
||||
PANEL, 3);
|
||||
|
||||
/* If we're resuming from suspend, blink suspend LED */
|
||||
if (acpi_is_wakeup_s3())
|
||||
|
|
Loading…
Add table
Reference in a new issue