From c6501e2b5dbab2cc885df124c1f758f39c035fc2 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 10 Apr 2002 16:01:38 +0000 Subject: [PATCH] mods for the PCM 9574. Support for the 39sf020 --- src/arch/i386/lib/i386_subr.c | 2 +- src/cpu/p6/mtrr.c | 6 ++++ src/mainboard/advantech/pcm-9574/Config | 8 ++--- util/flash_and_burn/flash_rom.c | 2 +- util/flash_and_burn/sst39sf020.c | 47 ++++++++++++++++++------- 5 files changed, 47 insertions(+), 18 deletions(-) diff --git a/src/arch/i386/lib/i386_subr.c b/src/arch/i386/lib/i386_subr.c index 72222371f1..0fa1e16f2d 100644 --- a/src/arch/i386/lib/i386_subr.c +++ b/src/arch/i386/lib/i386_subr.c @@ -29,7 +29,7 @@ void cache_on(unsigned long totalram) * so absolute minimum needed to get it going. */ /* OK, linux it turns out does nothing. We have to do it ... */ -#if defined(i686) +#if defined(i686) // totalram here is in linux sizing, i.e. units of KB. // set_mtrr is responsible for getting it into the right units! setup_mtrrs(totalram); diff --git a/src/cpu/p6/mtrr.c b/src/cpu/p6/mtrr.c index 39085ff606..0fe8d8ff03 100644 --- a/src/cpu/p6/mtrr.c +++ b/src/cpu/p6/mtrr.c @@ -341,6 +341,7 @@ void setup_mtrrs(unsigned long ramsizeK) ramsizeK -= range_wb; } } + printk_debug("DONE variable MTRRs\n"); #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE) #if XIP_ROM_SIZE < 4096 #error XIP_ROM_SIZE must be at least 4K @@ -361,13 +362,18 @@ void setup_mtrrs(unsigned long ramsizeK) MTRR_TYPE_WRPROT); } #endif /* XIP_ROM_SIZE && XIP_ROM_BASE */ + printk_debug("Clear out the extra MTRR's\n"); /* Clear out the extra MTRR's */ while(reg < MTRRS) { intel_set_var_mtrr(reg++, 0, 0, 0); } + printk_debug("call intel_set_fixed_mtrr()\n"); intel_set_fixed_mtrr(); /* enable fixed MTRR */ + printk_debug("call intel_enable_fixed_mtrr()\n"); intel_enable_fixed_mtrr(); + printk_debug("call intel_enable_var_mtrr()\n"); intel_enable_var_mtrr(); + printk_debug("Leave " __FUNCTION__ "\n"); } diff --git a/src/mainboard/advantech/pcm-9574/Config b/src/mainboard/advantech/pcm-9574/Config index d7eff6caea..b75bd1ec59 100644 --- a/src/mainboard/advantech/pcm-9574/Config +++ b/src/mainboard/advantech/pcm-9574/Config @@ -18,10 +18,10 @@ mainboardinit cpu/p6/earlymtrr.inc nsuperio winbond/w83977ef keyboard=1 com1={1} com2={1} floppy=1 nsuperio winbond/w83877tf -option ENABLE_FIXED_AND_VARIABLE_MTRRS -option MTRR_ONLY_TOP_64K_FLASH +option ENABLE_FIXED_AND_VARIABLE_MTRRS=0 +option MTRR_ONLY_TOP_64K_FLASH=1 option PIIX4_DEVFN=0x38 -option NO_KEYBOARD +option NO_KEYBOARD=1 option HAVE_PIRQ_TABLE=1 option ZKERNEL_START=0xfffc0000 option ZKERNEL_MASK=0x7f @@ -32,7 +32,7 @@ option L440BX object mainboard.o object irq_tables.o -option UPDATE_MICROCODE +option UPDATE_MICROCODE=1 option PAYLOAD_SIZE=196608 diff --git a/util/flash_and_burn/flash_rom.c b/util/flash_and_burn/flash_rom.c index 171fe3e9d5..24b07a7984 100644 --- a/util/flash_and_burn/flash_rom.c +++ b/util/flash_and_burn/flash_rom.c @@ -48,7 +48,7 @@ struct flashchip flashchips[] = { {"SST28SF040A", SST_ID, SST_28SF040, NULL, 512, 256, probe_28sf040, erase_28sf040, write_28sf040}, {"SST39SF020A", SST_ID, SST_39SF020, NULL, 256, 4096, - probe_jedec, erase_jedec, write_39sf020}, + probe_39sf020, erase_39sf020, write_39sf020}, {"W29C020C", WINBOND_ID, W_29C020C, NULL, 256, 128, probe_jedec, erase_jedec, write_jedec}, {NULL,} diff --git a/util/flash_and_burn/sst39sf020.c b/util/flash_and_burn/sst39sf020.c index 3c310a7754..49e695f890 100644 --- a/util/flash_and_burn/sst39sf020.c +++ b/util/flash_and_burn/sst39sf020.c @@ -72,13 +72,19 @@ static __inline__ erase_sector_39sf020 (volatile char * bios, unsigned long addr toggle_ready_jedec(bios); } -static __inline__ write_sector_39sf020(volatile char * bios, unsigned char * src, - volatile unsigned char * dst, unsigned int page_size) +static __inline__ write_sector_39sf020(volatile char * bios, + unsigned char * src, + volatile unsigned char * dst, + unsigned int page_size) { int i; volatile char *Temp; for (i = 0; i < page_size; i++) { + if (*dst != 0xff) { + printf("FATAL: dst %p not erased (val 0x%x\n", dst, *dst); + return; + } /* transfer data from source to destination */ if (*src == 0xFF) { dst++, src++; @@ -91,8 +97,11 @@ static __inline__ write_sector_39sf020(volatile char * bios, unsigned char * src *Temp = 0x55; Temp = bios + 0x5555; *Temp = 0xA0; - *dst++ = *src++; + *dst = *src; toggle_ready_jedec(bios); + if (*dst != *src) printf("BAD! dst 0x%x val 0x%x src 0x%x\n", + dst, *dst, *src); + dst++, src++; } } @@ -127,15 +136,29 @@ int probe_39sf020 (struct flashchip * flash) int erase_39sf020 (struct flashchip * flash) { - volatile char * bios = flash->virt_addr; - - unprotect_39sf020 (bios); - *bios = CHIP_ERASE; - *bios = CHIP_ERASE; - protect_39sf020 (bios); - + volatile unsigned char * bios = flash->virt_addr; + volatile unsigned char *Temp; + /* Issue the Sector Erase command to 39SF020 */ + printf(__FUNCTION__ " bios is %p\n", bios); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ myusec_delay(10); - toggle_ready_jedec(bios); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x80; /* write data 0x80 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ + myusec_delay(10); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x10; /* write data 0x55 to the address */ + + myusec_delay(20000); } int write_39sf020 (struct flashchip * flash, char * buf) @@ -145,7 +168,7 @@ int write_39sf020 (struct flashchip * flash, char * buf) volatile char * bios = flash->virt_addr; // unprotect_39sf020 (bios); - + erase_39sf020(flash); printf ("Programming Page: "); for (i = 0; i < total_size/page_size; i++) { /* erase the page before programming */