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mainboard/google/poppy: Generate digitizer node in SSDT

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Add support for generating digitizer node in SSDT using wacom i2c
driver.

BUG=None
BRANCH=None
TEST=Verified that the node shows up in SSDT.

Change-Id: If7e1e2463778c2ff7263eff995def149457edcde
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18373
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-02-15 09:53:50 -08:00 • committed by Furquan Shaikh
parent 231c198e2c
commit c57c48bd36
2 changed files with 15 additions and 1 deletions
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3
src/mainboard/google/poppy/Kconfig
View file

@ -21,6 +21,9 @@ config CHROMEOS
config DRIVERS_I2C_GENERIC config DRIVERS_I2C_GENERIC
def_bool y def_bool y
config DRIVERS_I2C_WACOM
def_bool y
config GBB_HWID config GBB_HWID
string string
depends on CHROMEOS depends on CHROMEOS

13
src/mainboard/google/poppy/devicetree.cb
View file

@ -208,7 +208,18 @@ chip soc/intel/skylake
end # I2C #0 end # I2C #0
device pci 15.1 on end # I2C #1 device pci 15.1 on end # I2C #1
device pci 15.2 on end # I2C #2 device pci 15.2 on end # I2C #2
device pci 15.3 on end # I2C #3 device pci 15.3 on
chip drivers/i2c/wacom
register "generic" = "{
.hid = WCOM50C1_HID,
.cid = PNP0C50_CID,
.desc = WCOM_DT_DESC,
.irq = IRQ_LEVEL_LOW(GPP_D1_IRQ),
}"
register "hid_desc_reg_offset" = "0x1"
device i2c 0x9 on end
end
end # I2C #3
device pci 16.0 on end # Management Engine Interface 1 device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device pci 16.2 off end # Management Engine IDE-R