Emulation/switch-coreboot
1
0
Fork 0
mirror of https://github.com/fail0verflow/switch-coreboot.git synced 2025-05-04 01:39:18 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Delete useless delay. The problem is not there, and besides, gas

Browse source 
doesn't work.
This commit is contained in:
Ronald G. Minnich 2001-03-27 00:41:39 +00:00
parent ee2455bf9d
commit c3c6eb5078
1 changed files with 5 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/northbridge/acer/m1631/ipl.S
View file

@ -40,7 +40,11 @@ it with the version available from LANL.
* set the right value.
*/
#define INIT_MCR $0xf6621000
/* GNU AS misassembles this. I can't believe what a piece of
* trash gas has turned out to be ...
#define LONGDELAY movw $0x1000, ax; 1: dec %ax; jnz 1b
*/
#define LONGDELAY 1: dec %ax; jnz 1b
#define WDELAY outb %al, $0x80; jmp 1f; 1: outb %al, $0x80
#define WRITE_MCR0 movl %ecx, %eax ; outl %eax, %dx ; WDELAY
/*#include <cpu/p5/start32.inc>*/
@ -256,8 +260,8 @@ sizeram:
/* you don't need to even care how large CAS is.
* Just set 4-bank mode, and set non-zero numbers into a few places.
* if the byte at 0 changes, you have two banks. Trivial.
*/
LONGDELAY
*/
movl $0x1000, %esi
movb $0, (%edi)
movb $5, (%esi)