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Small typos.

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Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@774 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-08-15 23:37:29 +00:00
parent e0031f798f
commit c37de66082
2 changed files with 4 additions and 4 deletions
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1
southbridge/amd/amd8111/amd8111_smbus.h
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@ -1,4 +1,5 @@
#include <device/smbus_def.h> #include <device/smbus_def.h>
#include <io.h>
#define SMBGSTATUS 0xe0 #define SMBGSTATUS 0xe0
#define SMBGCTL 0xe2 #define SMBGCTL 0xe2

7
southbridge/amd/amd8111/stage1_smbus.c
View file

@ -37,12 +37,11 @@
void enable_smbus(void) void enable_smbus(void)
{ {
u32 bdf; u32 dev;
u8 enable; u8 enable;
/* this 746b is the ACPI device. This is from original code. It's weird however. */ /* Yes, the ACPI device controls the SMBUS. */
pci_locate_device_on_bus(0, PCI_VENDOR_ID_AMD, 0x746b, &dev); if (!pci_conf1_find_on_bus(0, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ACPI, &dev)){
if (dev == PCI_DEV_INVALID) {
die("SMBUS controller not found\r\n"); die("SMBUS controller not found\r\n");
} }