From c25cd9fc6f6d27b9c3fe74874f0a248a7b236434 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <tpearson@raptorengineering.com>
Date: Mon, 1 Aug 2016 16:04:12 -0500
Subject: [PATCH] UPSTREAM: sb/amd/sb[6|7|8]00: Initialize PIC

The PIC was not initialized, leading to hangs when booting
Linux as a payload.  This error was hidden by both SeaBIOS
and GRUB due to both payloads initializing the PIC as a
matter of routine.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/16018
Tested-by: build bot (Jenkins)
Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>

Change-Id: I9a3b9bd831d4dafdd0bb82ea023026a10fe7efca
Reviewed-on: https://chromium-review.googlesource.com/368028
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/southbridge/amd/sb600/lpc.c | 5 +++++
 src/southbridge/amd/sb700/lpc.c | 5 +++++
 src/southbridge/amd/sb800/lpc.c | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c
index d459b1d3fd..0541518ca1 100644
--- a/src/southbridge/amd/sb600/lpc.c
+++ b/src/southbridge/amd/sb600/lpc.c
@@ -20,6 +20,8 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
+#include <pc80/i8259.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <pc80/isa-dma.h>
@@ -60,6 +62,9 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0x78, byte);
 
 	cmos_check_update_date();
+
+	setup_i8259(); /* Initialize i8259 pic */
+	setup_i8254(); /* Initialize i8254 timers */
 }
 
 static void sb600_lpc_read_resources(device_t dev)
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 78933fadf4..f138d88d72 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -21,6 +21,8 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
+#include <pc80/i8259.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <pc80/isa-dma.h>
@@ -75,6 +77,9 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0x78, byte);
 
 	cmos_check_update_date();
+
+	setup_i8259(); /* Initialize i8259 pic */
+	setup_i8254(); /* Initialize i8254 timers */
 }
 
 #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 3ba47a077b..f15fed366a 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -21,6 +21,8 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
+#include <pc80/i8259.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
 #include <arch/acpi.h>
@@ -66,6 +68,9 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0xBB, byte);
 
 	cmos_check_update_date();
+
+	setup_i8259(); /* Initialize i8259 pic */
+	setup_i8254(); /* Initialize i8254 timers */
 }
 
 static void sb800_lpc_read_resources(device_t dev)