From c1d89e14426821872d01031297658e0887be6445 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 25 May 2017 15:31:49 -0500 Subject: [PATCH] UPSTREAM: purism/librem13v2: Don't disable PM timer Needed for UEFI booting via Tianocore; with PM timer disabled, payload hangs. BUG=none BRANCH=none TEST=none Change-Id: I0ac172b90f496e44b117e3ec9a3809d7708b85b6 Signed-off-by: Patrick Georgi Original-Commit-Id: 0ff3b73990657516717ac8808edbd41e54d5209d Original-Change-Id: I6c65cb9d3e6a10baea4cc1e2d9e94c36fe419561 Original-Signed-off-by: Matt DeVillier Original-Reviewed-on: https://review.coreboot.org/19938 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth Reviewed-on: https://chromium-review.googlesource.com/531692 Commit-Ready: Patrick Georgi Tested-by: Patrick Georgi Reviewed-by: Patrick Georgi --- src/mainboard/purism/librem13v2/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/purism/librem13v2/devicetree.cb b/src/mainboard/purism/librem13v2/devicetree.cb index dc0655af50..8f8dc9253b 100644 --- a/src/mainboard/purism/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem13v2/devicetree.cb @@ -57,7 +57,7 @@ chip soc/intel/skylake register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s - register "PmTimerDisabled" = "1" + register "PmTimerDisabled" = "0" register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10"