mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
Fixed the raminit.inc so they don't need a working %esp.
Removed set of %esp from entry16.inc
This commit is contained in:
parent
68221584cc
commit
bfa9200c03
3 changed files with 10 additions and 25 deletions
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@ -135,14 +135,3 @@ _realstart:
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movw %ax, %fs
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movw %ax, %fs
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movw %ax, %gs
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movw %ax, %gs
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/* This is a redundant stack setup.
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* It redoes the more complete stack setup
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* in crt0.S. We do this here because on entry to crt0.S
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* some chipsets have memory set up and others don't. We have found
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* that some code in CRT0_PARAMETERS assume the stack is working
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* enough for call/return. So we have to have working stack or
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* things will crash. This fix as of 8/23/01 RGM
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*/
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/* set new stack */
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movl $_estack, %esp
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@ -42,16 +42,11 @@ register_setting_start:
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init_northbridge:
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init_northbridge:
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lodsw (%esi), %ax # load the register address/value to %ax
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lodsw (%esi), %ax # load the register address/value to %ax
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xchgb %al, %ah # exchange address/values for write_common
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xchgb %al, %ah # exchange address/values for write_common
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call write_northbridge_register
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loopnz init_northbridge
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jmp register_setting_end
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write_northbridge_register:
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write_northbridge_register:
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/* Input: AH - register number. AL - register value. */
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/* Input: AH - register number. AL - register value. */
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movl $NORTH_BRIDGE_BASE_ADDR, %edx
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movl $NORTH_BRIDGE_BASE_ADDR, %edx
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write_common:
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movl %eax, %ebx # Save %eax to %ebx.
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movl %eax, %ebx # Save %eax to %ebx.
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movzbl %bh, %eax # add register address to
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movzbl %bh, %eax # add register address to
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@ -65,7 +60,9 @@ write_common:
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addb %al, %dl
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addb %al, %dl
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movb %bl, %al
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movb %bl, %al
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outb %al, %dx
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outb %al, %dx
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ret # End of write_[lpc|pci]_reg
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loopnz init_northbridge
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jmp register_setting_end
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#ifdef SIS630S
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#ifdef SIS630S
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#include "630s_regs.inc"
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#include "630s_regs.inc"
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@ -42,16 +42,10 @@ register_setting_start:
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init_northbridge:
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init_northbridge:
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lodsw (%esi), %ax # load the register address/value to %ax
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lodsw (%esi), %ax # load the register address/value to %ax
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xchgb %al, %ah # exchange address/values for write_common
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xchgb %al, %ah # exchange address/values for write_common
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call write_northbridge_register
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loopnz init_northbridge
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jmp register_setting_end
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write_northbridge_register:
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/* Input: AH - register number. AL - register value. */
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/* Input: AH - register number. AL - register value. */
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movl $NORTH_BRIDGE_BASE_ADDR, %edx
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movl $NORTH_BRIDGE_BASE_ADDR, %edx
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write_common:
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movl %eax, %ebx # Save %eax to %ebx.
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movl %eax, %ebx # Save %eax to %ebx.
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movzbl %bh, %eax # add register address to
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movzbl %bh, %eax # add register address to
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@ -65,7 +59,12 @@ write_common:
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addb %al, %dl
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addb %al, %dl
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movb %bl, %al
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movb %bl, %al
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outb %al, %dx
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outb %al, %dx
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ret # End of write_[lpc|pci]_reg
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loopnz init_northbridge
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jmp register_setting_end
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#include "730s_regs.inc"
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#include "730s_regs.inc"
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