mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
clean up for old dead PCI code
This commit is contained in:
Li-Ta Lo
parent
f6e3094a96
commit
bd2c5afc45
2 changed files with 18 additions and 324 deletions
329
src/lib/newpci.c
329
src/lib/newpci.c
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@ -16,12 +16,6 @@
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#include <cpu/p5/io.h>
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#include <printk.h>
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#ifdef EMULATE
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#define DEBUG
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#endif
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#define DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(KERN_DEBUG x)
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#else
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@ -29,7 +23,6 @@
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#endif
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#define ONEMEG (1 << 20)
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#undef TWO_PASS_ALLOCATE
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#define PCI_MEM_START 0x80000000
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#define PCI_IO_START 0x1000
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@ -271,8 +264,6 @@ static const struct pci_ops *pci_check_direct(void)
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return 0;
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}
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// Need to merge all these functions. Sorry about this.
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// changing horses in mid-stream!
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int pci_read_config_byte(struct pci_dev *dev, u8 where, u8 * val)
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@ -292,54 +283,26 @@ int pci_read_config_dword(struct pci_dev *dev, u8 where, u32 * val)
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int pci_write_config_byte(struct pci_dev *dev, u8 where, u8 val)
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{
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DBG("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return conf->write_byte(dev->bus->number, dev->devfn, where, val);
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}
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int pci_write_config_word(struct pci_dev *dev, u8 where, u16 val)
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{
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DBG("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return conf->write_word(dev->bus->number, dev->devfn, where, val);
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}
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int pci_write_config_dword(struct pci_dev *dev, u8 where, u32 val)
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{
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DBG("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return conf->write_dword(dev->bus->number, dev->devfn, where, val);
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}
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int pci_debugwrite_config_byte(struct pci_dev *dev, u8 where, u8 val)
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{
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#ifndef DEBUG
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return conf->write_byte(dev->bus->number, dev->devfn, where, val);
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#else
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printk("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return 0;
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#endif
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}
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int pci_debugwrite_config_word(struct pci_dev *dev, u8 where, u16 val)
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{
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#ifndef DEBUG
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return conf->write_word(dev->bus->number, dev->devfn, where, val);
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#else
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printk("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return 0;
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#endif
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}
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int pci_debugwrite_config_dword(struct pci_dev *dev, u8 where, u32 val)
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{
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#ifndef DEBUG
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return conf->write_dword(dev->bus->number, dev->devfn, where, val);
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#else
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printk("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return 0;
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#endif
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}
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int pcibios_read_config_byte(unsigned char bus, unsigned char devfn, u8 where, u8 * val)
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{
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return conf->read_byte(bus, devfn, where, val);
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@ -357,55 +320,27 @@ int pcibios_read_config_dword(unsigned char bus, unsigned char devfn, u8 where,
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int pcibios_write_config_byte(unsigned char bus, unsigned char devfn, u8 where, u8 val)
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{
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DBG("Write byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return conf->write_byte(bus, devfn, where, val);
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}
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int pcibios_write_config_word(unsigned char bus, unsigned char devfn, u8 where, u16 val)
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{
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DBG("Write word bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return conf->write_word(bus, devfn, where, val);
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}
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int pcibios_write_config_dword(unsigned char bus, unsigned char devfn, u8 where, u32 val)
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{
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DBG("Write doubleword bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return conf->write_dword(bus, devfn, where, val);
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}
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int pcibios_debugwrite_config_byte(unsigned char bus, unsigned char devfn, u8 where, u8 val)
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{
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#ifndef DEBUG
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return conf->write_byte(bus, devfn, where, val);
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#else
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printk("Write byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return 0;
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#endif
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}
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int pcibios_debugwrite_config_word(unsigned char bus, unsigned char devfn, u8 where, u16 val)
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{
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#ifndef DEBUG
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return conf->write_word(bus, devfn, where, val);
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#else
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printk("Write word bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return 0;
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#endif
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}
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int pcibios_debugwrite_config_dword(unsigned char bus, unsigned char devfn, u8 where, u32 val)
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{
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#ifndef DEBUG
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return conf->write_dword(bus, devfn, where, val);
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#else
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printk("Write doubleword bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return 0;
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#endif
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}
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/** round a number to an alignment.
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* @param val the starting value
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* @param roundup Alignment as a power of two
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@ -459,175 +394,7 @@ void pci_set_method()
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* allocate for now.
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*/
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#ifdef TWO_PASS_ALLOCATE
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void compute_resources(struct pci_bus *bus)
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{
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int i;
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struct pci_bus *curbus;
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struct pci_dev *curdev;
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unsigned long mem, prefmem, io;
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mem = prefmem = io = 0;
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// first, walk all the bridges
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// Sum up the memory requirements of each bridge and add it into the
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// total.
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for (curbus = bus->children; curbus; curbus = curbus->next) {
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compute_resources(curbus);
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mem += curbus->mem;
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prefmem += curbus->prefmem;
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io += curbus->io;
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printk(KERN_DEBUG "Bridge Bus %d,mem 0x%lx, "
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"prefmem 0x%lx, io 0x%lx\n",
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curbus->number, mem, prefmem, io);
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}
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// second, walk all the devices. Add these.
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for (curdev = bus->devices; curdev; curdev = curdev->sibling) {
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for (i = 0; i < 6; i++) {
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unsigned long size = curdev->size[i];
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if (size & PCI_BASE_ADDRESS_SPACE_IO) {
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unsigned long iosize;
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iosize = size & PCI_BASE_ADDRESS_IO_MASK;
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printk(KERN_DEBUG "Bus %d, devfn 0x%x, "
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"reg %d: io 0x%lx\n",
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curdev->bus->number, curdev->devfn,
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i, iosize);
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io += round(iosize, IO_ALIGN);
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} else {
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unsigned long memorysize = size & (PCI_BASE_ADDRESS_MEM_MASK);
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unsigned long type = size & (~PCI_BASE_ADDRESS_MEM_MASK);
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// at this point it's memory. What kind?
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if (type == 0) { // normal
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unsigned long regmem;
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// align the memory value
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regmem = round(memorysize, MEM_ALIGN);
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mem = round(mem, regmem);
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printk(KERN_DEBUG "Bus %d, "
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"devfn 0x%x, reg %d: "
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"mem 0x%lx\n",
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curdev->bus->number,
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curdev->devfn, i, regmem);
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mem += regmem;
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} else if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
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unsigned long regmem;
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// align the memory value
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regmem = round(memorysize, MEM_ALIGN);
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prefmem = round(prefmem, regmem);
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printk(KERN_DEBUG "Bus %d, "
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"devfn 0x%x, reg %d: "
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"prefmem 0x%lx\n",
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curdev->bus->number,
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curdev->devfn, i, regmem);
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prefmem += regmem;
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} else
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printk(KERN_DEBUG "Bus %d, "
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"devfn 0x%x: Unsupported "
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"memory type 0x%lx\n",
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curdev->bus->number,
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curdev->devfn, type);
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}
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}
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}
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// assign to this bus.
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bus->mem = round(mem, ONEMEG);
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bus->prefmem = round(prefmem, ONEMEG);
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bus->io = round(io, IO_BRIDGE_ALIGN);
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}
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void allocate_resources(struct pci_bus *bus)
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{
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int i;
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struct pci_bus *curbus;
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struct pci_dev *curdev;
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unsigned long mem, io, prefmem;
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// first, walk all the bridges
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// Give each bridge what it needs, then call that bridge to configure
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// itself and its devices.
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mem = bus->membase;
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prefmem = bus->prefmembase;
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io = bus->iobase;
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for (curbus = bus->children; curbus; curbus = curbus->next) {
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unsigned long memincrement;
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unsigned long ioincrement;
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// we don't need to round here -- all sizes are already rounded!
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if (curbus->mem) {
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curbus->membase = mem;
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memincrement = curbus->mem;
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curbus->memlimit = curbus->membase + memincrement - 1;
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mem += memincrement;
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}
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if (curbus->prefmem) {
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curbus->prefmembase = prefmem;
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memincrement = curbus->prefmem;
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curbus->prefmemlimit = curbus->prefmembase + memincrement - 1;
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prefmem += memincrement;
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}
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if (curbus->io) {
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curbus->iobase = io;
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ioincrement = curbus->io;
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curbus->iolimit = curbus->io + ioincrement - 1;
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io += ioincrement;
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}
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allocate_resources(curbus);
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printk(KERN_DEBUG "Bridge Bus %d,mem 0x%lx, "
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"prefmem 0x%lx, io 0x%lx\n",
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curbus->number, mem, prefmem, io);
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}
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// Now hand out device memory.
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for (curdev = bus->devices; curdev; curdev = curdev->sibling) {
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for (i = 0; i < 6; i++) {
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if (!curdev->size[i])
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continue;
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if (curdev->size[i] & PCI_BASE_ADDRESS_SPACE_IO) {
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curdev->command |= PCI_COMMAND_IO;
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curdev->base_address[i] = io;
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printk(KERN_DEBUG "bus %d devfn 0x%x "
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"reg %d io 0x%lx\n",
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bus->number, curdev->devfn, i, io);
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io += curdev->size[i] & PCI_BASE_ADDRESS_IO_MASK;
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} else {
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if (curdev->size[i] & PCI_BASE_ADDRESS_MEM_PREFETCH) {
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unsigned long size = curdev->size[i] & PCI_BASE_ADDRESS_MEM_MASK;
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// align the memory
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size = round(size, MEM_ALIGN);
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prefmem = round(prefmem, size);
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curdev->command |= PCI_COMMAND_MEMORY;
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curdev->base_address[i] = prefmem;
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printk(KERN_DEBUG "bus %d devfn 0x%x "
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"reg %d prefmem 0x%lx\n",
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bus->number, curdev->devfn,
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i, prefmem);
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prefmem += size;
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} else {
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unsigned long size = curdev->size[i] & PCI_BASE_ADDRESS_MEM_MASK;
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// align the memory
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size = round(size, MEM_ALIGN);
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mem = round(mem, size);
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curdev->command |= PCI_COMMAND_MEMORY;
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curdev->base_address[i] = mem;
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printk(KERN_DEBUG "bus %d devfn 0x%x "
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"reg %d mem 0x%lx\n",
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bus->number, curdev->devfn,
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i, mem);
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mem += size;
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}
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}
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}
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}
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}
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#else /* single pass allocation */
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/** Given a desired amount of io, round it to IO_BRIDGE_ALIGN
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* @param amount Amount of memory desired.
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*/
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@ -830,14 +597,11 @@ void compute_allocate_resources(struct pci_bus *bus)
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compute_allocate_prefmem(bus);
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}
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#endif /* TWO_PASS_ALLOCATE */
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/** Assign the computed resources to the bridges and devices on the bus.
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* Recurse to any bridges found on this bus first. Then do the devices
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* on this bus.
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* @param bus Pointer to the structure for this bus
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*/
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void assign_resources(struct pci_bus *bus)
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{
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struct pci_dev *curdev = pci_devices;
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@ -952,66 +716,3 @@ void pci_enable()
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// now enable everything.
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enable_resources(&pci_root);
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}
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// is this dead code? think so. -- RGM
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int configure_pci(unsigned long memstart, unsigned long iostart)
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{
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#ifdef EMULATE
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int iopl(int level);
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iopl(3);
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// pick how to scan the bus
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pci_set_method();
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#else
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// FIX ME. We really should use whatever is set up elsewhere.
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void malloc_init(unsigned long start, unsigned long end);
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// pick the last 1M of memory to put our structures in.
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malloc_init(memstart - ONEMEG, memstart - 1);
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#endif
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// scan it.
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pci_init();
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#ifdef TWO_PASS_ALLOCATE
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/* compute the memory resources. You can't just add up the
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* per-device resources. You have to walk the bridges, because
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* bridges require 1M granularity at 1M alignments (!)
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*/
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pci_root.mem = pci_root.prefmem = pci_root.io = 0;
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compute_resources(&pci_root);
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printk(KERN_DEBUG "Total: 0x%lx mem, 0x%lx prefmem, 0x%lx io\n",
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pci_root.mem, pci_root.prefmem, pci_root.io);
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// set in the bases and limits for the root. These really apply to the
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// subordinate busses and devices.
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pci_root.membase = memstart;
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pci_root.memlimit = pci_root.membase + pci_root.mem - 1;
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pci_root.prefmembase = round(pci_root.memlimit, ONEMEG);
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pci_root.prefmemlimit = pci_root.prefmembase + pci_root.prefmem - 1;
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pci_root.iobase = iostart;
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pci_root.iolimit = 0xffff - iostart;
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allocate_resources(&pci_root);
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#else
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pci_root.membase = PCI_MEM_START;
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pci_root.prefmembase = PCI_MEM_START;
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pci_root.iobase = PCI_IO_START;
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compute_allocate_resources(&pci_root);
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#endif /* TWO_PASS_ALLOCATE */
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// now just set things into registers ... we hope ...
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assign_resources(&pci_root);
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// now enable everything.
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enable_resources(&pci_root);
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return 0;
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}
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#ifdef EMULATE
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/** deprecated, you can run this code in user mode for certain testing
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* We haven't used this recently so it's unclear if it works.
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*/
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int main()
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{
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unsigned long memstart = 0x40000000;
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unsigned long iostart = 0x1000;
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configure_pci(memstart, iostart);
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return 0;
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}
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#endif
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@ -9,12 +9,12 @@ static char rcsid[] = "$Id$";
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#endif
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#include <cpu/p5/io.h>
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#include <cpu/p5/macros.h>
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#include <cpu/p6/msr.h>
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#include <printk.h>
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#include <pci.h>
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#include <subr.h>
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#include <linux/asm-i386/msr.h>
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#ifdef SERIAL_CONSOLE
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#include <serial_subr.h>
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@ -106,12 +106,6 @@ void printint(unsigned long x)
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void error(char errmsg[])
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{
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display(errmsg);
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/* what a bad idea -- this wipes out the most recent POST!
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* comment out unless someone comes up with a great reason to keep it.
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intel_post(0xee);
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*/
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while (1); /* Halt */
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}
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@ -195,7 +189,6 @@ void intel_interrupts_on()
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void intel_zero_irq_settings(void)
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{
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struct pci_dev *pcidev;
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// unsigned char irq;
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unsigned char line;
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pcidev = pci_devices;
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@ -221,7 +214,7 @@ void intel_check_irq_routing_table(void)
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|||
addr = (u8 *)rt;
|
||||
|
||||
sum = 0;
|
||||
for (i=0; i<rt->size; i++)
|
||||
for (i = 0; i < rt->size; i++)
|
||||
sum += addr[i];
|
||||
|
||||
printk(KERN_DEBUG "%s:%6d:%s() - "
|
||||
|
|
|
|||
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Add table
Reference in a new issue