From b89d99ddfd612e3b7088e4d3774f753624a6eeb6 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 27 Jun 2007 21:01:01 +0000 Subject: [PATCH] Ron's arch code., slightly changed. Another one will follow These are changes needed for geode lx. Also, we are moving CPU bug fixes into initram. This simplifies the code and, also, guarantees that cpu bugs won't cause trouble to initram. All LX targets compile. Most of these changes have been run by the list. Signed-off-by: Ronald G. Minnich Acked-by: Stefan Reinauer git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@386 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- arch/x86/geodelx.c | 5 +- arch/x86/geodelx/cpu.c | 101 +++++++++++++++++++++++++++++++++++++++++ arch/x86/isa-dma.c | 3 +- 3 files changed, 107 insertions(+), 2 deletions(-) create mode 100644 arch/x86/geodelx/cpu.c diff --git a/arch/x86/geodelx.c b/arch/x86/geodelx.c index 17585f5518..823bb2187b 100644 --- a/arch/x86/geodelx.c +++ b/arch/x86/geodelx.c @@ -26,9 +26,9 @@ #include #include #include +#include #include #include -#include /* all these functions used to be in a lot of fiddly little files. To * make it easier to find functions, we are merging them here. This @@ -574,4 +574,7 @@ void cpu_reg_init(int debug_clock_disable, u8 dimm0, u8 dimm1) msr.hi = 0; msr.lo = 0x00000603C; wrmsr(msrnum, msr); + /* fix cpu bugs */ +#warning testing fixing bugs in initram + cpu_bug(); } diff --git a/arch/x86/geodelx/cpu.c b/arch/x86/geodelx/cpu.c new file mode 100644 index 0000000000..e4057e191d --- /dev/null +++ b/arch/x86/geodelx/cpu.c @@ -0,0 +1,101 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2006 Indrek Kruusa + * Copyright (C) 2006 Ronald G. Minnich + * Copyright (C) 2006 Stefan Reinauer + * Copyright (C) 2006 Andrei Birjukov + * Copyright (C) 2007 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License, or + * (at your option) any later version.. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + + +/* This is a test for the idea of a cpu device. There is only ever + * going to be one CPU device, the bootstrap processor or BP; other + * processors will go through a different path. on Geode it is + * really simple, so we start with that. Later, it gets harder. + */ + +#include +#include +#include +#include +#include +#include + +/* TODO: better comment on vsm_end_post_smi, and define 0x05a2 down below */ +/** + * This is a call to the VSM. + * We need to know what it does. + */ +static void vsm_end_post_smi(void) +{ + __asm__ volatile ("push %ax\n" + "mov $0x5000, %ax\n" + ".byte 0x0f, 0x38\n" "pop %ax\n"); +} + +/** + * The very last steps in lx init. Turn on caching, + * tell vsm that we are done. Turn A20 back on in + * case VSM turned it off. + * @param dev struct device pointer + */ +static void lx_init(struct device *dev) +{ + printk(BIOS_SPEW, "lx_init\n"); + + /* Turn on caching if we haven't already */ + enable_cache(); + + // do VSA late init + vsm_end_post_smi(); + + // Set gate A20 (legacy vsm disables it in late init) + printk(BIOS_SPEW, "A20 (0x92): %d\n", inb(0x92)); + outb(0x02, 0x92); + printk(BIOS_SPEW, "A20 (0x92): %d\n", inb(0x92)); + + printk(BIOS_SPEW, "CPU lx_init DONE\n"); +}; + +/* The only operations currently set up are the phase 6. We might, + * however, set up an op in phase3_scan to get the cpuinfo into a + * struct for all to see. On SMP, it would not be hard to have + * phase3 scan set up an array of such structs. Further, for systems + * which have multiple types of CPUs, you can compile in multiple CPU + * files and use the device id, at scan time, to pick which one is + * used. There is a lot of flexibility here! + */ +struct device_operations geodelx_cpuops = { + .constructor = default_device_constructor, + .phase3_scan = NULL, + .phase6_init = lx_init, +}; + +/* This is a constructor for a cpu. the PCI id works for now. + * Later, we might need to change it to use a different phase3 scan, + * and match on a cpu id. However, CPU IDs are known to be kind + * of weird, depending on date manufactured they can be all + * over the place (the Geode alone has had 3 vendors!) so + * we will have to be careful + */ +struct constructor geodelx_constructors[] = { + {.id = {.type = DEVICE_ID_PCI, + .u = {.pci = {.vendor = X86_VENDOR_AMD,.device = 0x05A2}}}, + .ops = &geodelx_cpuops}, + {.ops = 0}, +}; diff --git a/arch/x86/isa-dma.c b/arch/x86/isa-dma.c index 5d4fe457a5..c569a3ffa7 100644 --- a/arch/x86/isa-dma.c +++ b/arch/x86/isa-dma.c @@ -1,5 +1,6 @@ +/* where is this from? */ + #include -#include /* DMA controller registers */ #define DMA1_CMD_REG 0x08 /* command register (w) */