Emulation/switch-coreboot
1
0
Fork 0
mirror of https://github.com/fail0verflow/switch-coreboot.git synced 2025-05-04 01:39:18 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

One missed function rename in the stage2 pci resources allocation. phase4_assign_resources is now phase4_set_resources. (trivial)

Browse source 
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>

git-svn-id: svn://coreboot.org/repository/coreboot-v3@1117 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Marc Jones 2009-01-20 00:03:11 +00:00
parent 67d036327d
commit b8562cfb7b
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
northbridge/via/cn700/pci_domain.c
View file

@ -114,7 +114,7 @@ static void cn700_pci_domain_set_resources(struct device *dev)
/* TODO: shadow ram needs to be controlled via dts */
ram_resource(dev, idx++, 1024,
(tolmk - 1024 - (CONFIG_CN700_VIDEO_MB * 1024)));
phase4_assign_resources(&dev->link[0]);
phase4_set_resources(&dev->link[0]);
}
/** Operations for when the northbridge is running a PCI domain. */