From b7a905b22a5fd1036df49b6d0a64fb79709eb081 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 25 Nov 2016 16:00:01 +0100 Subject: [PATCH] UPSTREAM: nb/intel/sandybridge/raminit: Fix normalize_training Remove cross rank/cross channel dependency. I guess this is a mistake that could lead to instabilities. Tested on Lenovo T430 (Intel IvyBridge). BUG=none BRANCH=none TEST=none Change-Id: I9983d6c92b2729c602f4de1a593bd250e1fc80e4 Signed-off-by: Patrick Georgi Original-Commit-Id: 3c8cb97ea726cfc4643f75380240e253c095bc14 Original-Change-Id: I899db907cd2d2197fd81eda4c4656fb1e570c18f Original-Signed-off-by: Patrick Rudolph Original-Reviewed-on: https://review.coreboot.org/17610 Original-Reviewed-by: Arthur Heymans Original-Reviewed-by: Philippe Mathieu-Daud Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/472706 --- src/northbridge/intel/sandybridge/raminit_common.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 8baa0f25d1..0c77004bae 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -3023,10 +3023,11 @@ int discover_timC_write(ramctr_timing *ctrl) void normalize_training(ramctr_timing * ctrl) { int channel, slotrank, lane; - int mat = 0; + int mat; FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS { int delta; + mat = 0; FOR_ALL_LANES mat = max(ctrl->timings[channel][slotrank].lanes[lane].timA, mat); printram("normalize %d, %d, %d: mat %d\n",