mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
more fixes for dave ashley
This commit is contained in:
parent
5aad3ba0d0
commit
b643e782d0
3 changed files with 18 additions and 6 deletions
|
@ -139,8 +139,8 @@ __asm__ (
|
|||
" orl $0x0000001, %eax\n" /* PE = 1 */
|
||||
" movl %eax, %cr0\n"
|
||||
/* Now that we are in protected mode jump to a 32 bit code segment. */
|
||||
" ljmpl $0x10, $1f\n"
|
||||
"1:\n"
|
||||
" ljmpl $0x10, $vgarestart\n"
|
||||
"vgarestart:\n"
|
||||
".code32\n"
|
||||
" movw $0x18, %ax\n"
|
||||
" movw %ax, %ds\n"
|
||||
|
|
|
@ -9,9 +9,20 @@ mainboard via/epia-m
|
|||
|
||||
# Enable Serial Console for debugging
|
||||
option SERIAL_CONSOLE=1
|
||||
# option SERIAL_POST=1
|
||||
option TTYS0_BAUD=115200
|
||||
#option SERIAL_POST=1
|
||||
#option TTYS0_BAUD=115200
|
||||
# option TTYS0_BAUD=57600
|
||||
option HAVE_FRAMEBUFFER=1
|
||||
option CONFIG_VGABIOS=1
|
||||
option CONFIG_REALMODE_IDT=1
|
||||
dir src/bioscall
|
||||
option CONFIG_PCIBIOS=1
|
||||
option VGABIOS_START=0xfffe0000
|
||||
addaction romimage dd if=../vgabios.bin of=romimage bs=65536 seek=2 conv=sync conv=notrunc
|
||||
option CONFIG_EPIAMVERSIONSTRING="5.0.0E-" __DATE__ " " __TIME__
|
||||
target /ram/freebios/obj
|
||||
payload /code/bootfiles/etherboot/via6105m.ebi
|
||||
|
||||
option DEFAULT_CONSOLE_LOGLEVEL=9
|
||||
option DEBUG=1
|
||||
|
||||
|
|
|
@ -86,8 +86,6 @@ static unsigned char vt1211hwmonitorinits[]={
|
|||
void
|
||||
mainboard_fixup()
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
int i;
|
||||
printk_info("Mainboard fixup\n");
|
||||
|
||||
northbridge_fixup();
|
||||
|
@ -97,6 +95,9 @@ mainboard_fixup()
|
|||
void
|
||||
final_southbridge_fixup()
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
int i;
|
||||
|
||||
printk_info("Southbridge fixup\n");
|
||||
|
||||
// nvram_on();
|
||||
|
|
Loading…
Add table
Reference in a new issue