UPSTREAM: soc/intel/quark: Make ramstage relocatable

Relocate ramstage into CBMEM.

TEST=Build and run on Galileo Gen2

BUG=None
BRANCH=None

Change-Id: Ic8218ae3f173091b78bc722d6d4e11c24cae0742
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15994
Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/367383
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Lee Leahy 2016-07-21 14:14:02 -07:00 committed by chrome-bot
parent 5707d1269a
commit b5b1e3df96

View file

@ -30,6 +30,7 @@ config CPU_SPECIFIC_OPTIONS
select C_ENVIRONMENT_BOOTBLOCK
select HAVE_HARD_RESET
select REG_SCRIPT
select RELOCATABLE_RAMSTAGE
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_RESET
select SOC_SETS_MSRS