mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
AUTHORS
- Add myself src/cpu/p5/delay_tsc.c - Fix the indentation - Don't have the new calibrate_tsc function directly update global variables. src/include/smp/start_stop.h - Change #ifdef SMP to #if SMP == 1 src/include/string.h - Declare sprintf src/lib/elfboot.c - Minor fixes to verify_loaded_image - Change all of the new debugging messages to printk_spew src/lib/inflate.c - Remove sensless warning message fixes src/lib/linuxpci.c - move declaration of sprintf to string.h - Better detection of read only bars in pci_get_resource - Remove pci_noop - Remove warning about set_pci_dev_ops not being finished src/lib/src.c - change #ifdef SERIAL_POST to #if SERIAL_POST in post_code
This commit is contained in:
parent
b708444232
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b1a740bc28
8 changed files with 53 additions and 65 deletions
1
AUTHORS
1
AUTHORS
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@ -1,6 +1,7 @@
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Contributors (in alpha order):
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Eric Biederman <ebiederman@lnxi.com> - 440GX SPD, elfboot, mkelfImage, Athlon SMP, P4 Xeon, etc
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Jeff Garzik <jgarzik@mandrakesoft.com> - The essential /dev/fb! First freebios
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James Hendricks <jimi@lanl.gov> - SMP for 440GX among many other things
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Ollie Lho <ollie@sis.com.tw> - SIS 630
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@ -98,45 +98,39 @@ bad_ctc:
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*/
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static unsigned long long calibrate_tsc(void)
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{
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unsigned long long retval, start, end, delta;
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unsigned long allones = (unsigned long) -1, result;
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unsigned long startlow, starthigh;
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unsigned long endlow, endhigh;
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unsigned long count;
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rdtsc(startlow,starthigh);
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// no udivdi3, dammit.
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// so we count to 1<< 20 and then right shift 20
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for(count = 0; count < (1<<20); count ++)
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outb(0x80, 0x80);
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rdtsc(endlow,endhigh);
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// make delta be (endhigh - starthigh) + (endlow - startlow)
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// but >> 20
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// do it this way to avoid gcc warnings.
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start = starthigh;
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start <<= 32;
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start |= startlow;
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end = endhigh;
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end <<= 32;
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end |= endlow;
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delta = end - start;
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// at this point we have a delta for 1,000,000 outbs. Now rescale for one microsecond.
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delta >>= 20;
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// save this for microsecond timing.
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clocks_per_usec = delta;
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#define DEBUG
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#ifdef DEBUG
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printk_notice("end %x:%x, start %x:%x\n",
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endhigh, endlow, starthigh, startlow);
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printk_notice("32-bit delta %d\n", (unsigned long) delta);
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#endif
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retval = clocks_per_usec;
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#ifdef DEBUG
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printk_notice(__FUNCTION__ " 32-bit result is %d\n", result);
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#endif
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return retval;
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unsigned long long retval, start, end, delta;
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unsigned long allones = (unsigned long) -1, result;
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unsigned long startlow, starthigh;
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unsigned long endlow, endhigh;
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unsigned long count;
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rdtsc(startlow,starthigh);
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// no udivdi3, dammit.
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// so we count to 1<< 20 and then right shift 20
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for(count = 0; count < (1<<20); count ++)
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outb(0x80, 0x80);
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rdtsc(endlow,endhigh);
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// make delta be (endhigh - starthigh) + (endlow - startlow)
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// but >> 20
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// do it this way to avoid gcc warnings.
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start = starthigh;
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start <<= 32;
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start |= startlow;
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end = endhigh;
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end <<= 32;
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end |= endlow;
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delta = end - start;
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// at this point we have a delta for 1,000,000 outbs. Now rescale for one microsecond.
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delta >>= 20;
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// save this for microsecond timing.
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result = delta;
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printk_spew("end %x:%x, start %x:%x\n",
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endhigh, endlow, starthigh, startlow);
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printk_spew("32-bit delta %d\n", (unsigned long) delta);
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printk_spew(__FUNCTION__ " 32-bit result is %d\n", result);
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return retval;
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}
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@ -149,7 +143,7 @@ void udelay(unsigned long us)
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unsigned long long clocks;
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if (!clocks_per_usec) {
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calibrate_tsc();
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clocks_per_usec = calibrate_tsc();
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printk_info("clocks_per_usec: %u\n", clocks_per_usec);
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}
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clocks = us;
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@ -1,7 +1,7 @@
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#ifndef SMP_START_STOP_H
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#define SMP_START_STOP_H
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#ifdef SMP
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#if SMP == 1
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#include <smp/atomic.h>
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unsigned long this_processors_id(void);
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int processor_index(unsigned long processor_id);
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@ -32,4 +32,5 @@ extern void *memcpy(void *dest, const void *src, size_t n);
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extern void *memset(void *s, int c, size_t n);
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extern int memcmp(const void *s1, const void *s2, size_t n);
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extern int sprintf(char * buf, const char *fmt, ...);
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#endif /* STRING_H */
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@ -67,7 +67,7 @@ int verify_ip_checksum(
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bytes += sizeof(*ehdr);
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checksum = add_ip_checksums(bytes, checksum,
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compute_ip_checksum(phdr, ehdr->e_phnum*sizeof(*phdr)));
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bytes += sizeof(*phdr);
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bytes += ehdr->e_phnum*sizeof(*phdr);
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for(ptr = head->phdr_next; ptr != head; ptr = ptr->phdr_next) {
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checksum = add_ip_checksums(bytes, checksum,
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compute_ip_checksum((void *)ptr->s_addr, ptr->s_memsz));
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@ -574,8 +574,6 @@ int elfload(struct stream *stream, struct lb_memory *mem,
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/* Verify the loaded image */
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if (!verify_loaded_image(cb_chain, ehdr, phdr, &head))
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goto out;
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/*
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*/
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printk_info("verified segments\n");
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/* Shutdown the stream device */
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@ -626,7 +624,7 @@ int elfboot(struct stream *stream, struct lb_memory *mem)
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for(i = 0; i < ELF_HEAD_SIZE - (sizeof(Elf_ehdr) + sizeof(Elf_phdr)); i+=16) {
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ehdr = (Elf_ehdr *)(&header[i]);
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if (memcmp(ehdr->e_ident, ELFMAG, 4) != 0) {
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printk_debug("NO header at %d\n", i);
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printk_spew("NO header at %d\n", i);
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continue;
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}
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printk_debug("Found ELF candiate at offset %d\n", i);
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}
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ehdr = 0;
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}
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printk_debug("header_offset is %d\n", header_offset);
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printk_spew("header_offset is %d\n", header_offset);
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if (header_offset == -1) {
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goto out;
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}
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printk_debug("Try to load at offset 0x%x\n", header_offset);
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printk_spew("Try to load at offset 0x%x\n", header_offset);
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result = elfload(stream, mem,
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header + header_offset , ELF_HEAD_SIZE - header_offset);
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out:
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@ -1097,9 +1097,9 @@ int gunzip(void)
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return -1;
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}
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(ulg)get_byte(); /* Get timestamp */
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((ulg)get_byte());// << 8;
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((ulg)get_byte());// << 16;
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((ulg)get_byte());// << 24;
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((ulg)get_byte()) << 8;
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((ulg)get_byte()) << 16;
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((ulg)get_byte()) << 24;
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(void)get_byte(); /* Ignore extra flags for the moment */
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(void)get_byte(); /* Ignore OS type for the moment */
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@ -23,8 +23,7 @@ static char rcsid[] = "$Id$";
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#include <string.h>
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#include <subr.h>
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// yes we could do Yet Another Include File, but ...
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int sprintf(char * buf, const char *fmt, ...);
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/**
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* This is the root of the PCI tree. A PCI tree always has
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*/
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static void pci_get_resource(struct pci_dev *dev, struct resource *resource, unsigned long index)
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{
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uint32_t addr, size;
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uint32_t addr, size, base;
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unsigned long type;
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/* Initialize the resources to nothing */
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pci_write_config_dword(dev, index, ~0);
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pci_read_config_dword(dev, index, &size);
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/* get the minimum value the bar can be set to */
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pci_write_config_dword(dev, index, 0);
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pci_read_config_dword(dev, index, &base);
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/* restore addr */
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pci_write_config_dword(dev, index, addr);
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* This incidentally catches the common case where registers
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* read back as 0 for both address and size.
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*/
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if (addr == size) {
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if ((addr == size) && (addr == base)) {
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if (size != 0) {
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printk_debug(
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"PCI: %02x:%02x.%01x register %02x(%08x), read-only ignoring it\n",
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static void pci_set_resource(struct pci_dev *dev, struct resource *resource)
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{
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unsigned long base, limit;
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unsigned long bridge_align = MEM_BRIDGE_ALIGN; // stupid warnings.
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unsigned long bridge_align = MEM_BRIDGE_ALIGN;
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unsigned char buf[10];
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/* Make certain the resource has actually been set */
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pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 64 >> 2);
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}
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// probably dead.
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#if 0
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static void pci_noop(struct pci_dev *dev)
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{
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return;
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}
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#endif
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struct pci_dev_operations default_pci_ops_dev = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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break;
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}
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}
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#warning set_pci_dev_ops not yet finished
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/* If I don't have a specific driver use the default operations */
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switch(dev->hdr_type & 0x7f) { /* header type */
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case PCI_HEADER_TYPE_NORMAL: /* standard header */
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@ -89,7 +89,7 @@ void error(char errmsg[])
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*/
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void post_code(uint8_t value)
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{
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#ifdef SERIAL_POST
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#if SERIAL_POST
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unsigned long hi, lo;
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// DAMMIT! This just broke!
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//rdtsc(lo, hi);
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