UPSTREAM: cpu/cpu.h: Drop excessive includes

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17734
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Ifeef04b68760522ce7f230a51f5df354e6da6607
Reviewed-on: https://chromium-review.googlesource.com/417947
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-12-06 14:12:04 +02:00 committed by chrome-bot
parent 15a16b97cc
commit b160f80489
32 changed files with 0 additions and 32 deletions

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@ -26,7 +26,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -21,7 +21,6 @@
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <ec/quanta/ene_kb3940q/ec.h>

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@ -20,7 +20,6 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <ec/google/chromeec/ec.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <ec/compal/ene932/ec.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <ec/google/chromeec/ec.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <bootmode.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <vendorcode/google/chromeos/gnvs.h>

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@ -25,7 +25,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>

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@ -26,7 +26,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>

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@ -20,7 +20,6 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <soc/acpi.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/bd82x6x/pch.h>

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@ -25,7 +25,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
#include <soc/nvs.h>