From af9cf8a1380e89db488711799a21cbf686b9b447 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Thu, 28 Jun 2007 18:29:46 +0000 Subject: [PATCH] Trivial cleanup to make things compile: - Makefile corretion - one last usage of msr_t (we hope) Hmm, did we decide to add sdram directory? I will remove this -- it's a mistake. Signed-off-by: Ronald G. Minnich Acked-by: Ronald G. Minnich git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@402 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- mainboard/adl/msm800sev/Makefile | 6 +++--- northbridge/amd/geodelx/raminit.c | 16 ++++++++-------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/mainboard/adl/msm800sev/Makefile b/mainboard/adl/msm800sev/Makefile index 2ce748574d..090dd6b0d2 100644 --- a/mainboard/adl/msm800sev/Makefile +++ b/mainboard/adl/msm800sev/Makefile @@ -29,7 +29,7 @@ INITRAM_OBJ = $(obj)/mainboard/$(MAINBOARDDIR)/initram.o \ $(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\ $(obj)/superio/winbond/w83627hf/w83627hf_early_serial.o\ $(obj)/device/pnp_raw.o \ - $(obj)/arch/x86/geodelx.o + $(obj)/arch/x86/geodelx/geodelx.o $(obj)/linuxbios.initram: $(obj)/stage0.init $(obj)/stage0.o $(INITRAM_OBJ) $(Q)# initram links against stage0 @@ -67,9 +67,9 @@ $(obj)/option_table: $(obj)/mainboard/$(MAINBOARDDIR)/option_table.o $(Q)printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n" $(Q)$(OBJCOPY) -O binary $< $@ -STAGE2_MAINBOARD_OBJ = +STAGE2_MAINBOARD_OBJ = -STAGE2_CHIPSET_OBJ = $(obj)/arch/x86/geodecpu.o +STAGE2_CHIPSET_OBJ = $(obj)/arch/x86/geodelx/geodelx.o $(obj)/arch/x86/geodelx/cpu.o $(obj)/mainboard/$(MAINBOARDDIR)/%.o: $(src)/mainboard/$(MAINBOARDDIR)/%.c $(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR) diff --git a/northbridge/amd/geodelx/raminit.c b/northbridge/amd/geodelx/raminit.c index e4e14e788a..0f9397ccd4 100644 --- a/northbridge/amd/geodelx/raminit.c +++ b/northbridge/amd/geodelx/raminit.c @@ -47,7 +47,7 @@ static void auto_size_dimm(unsigned int dimm, u8 dimm0, u8 dimm1) u32 dimm_setting; u16 dimm_size; u8 spd_byte; - msr_t msr; + struct msr msr; dimm_setting = 0; @@ -207,7 +207,7 @@ static void set_refresh_rate(u8 dimm0, u8 dimm1) { u8 spd_byte0, spd_byte1; u16 rate0, rate1; - msr_t msr; + struct msr msr; spd_byte0 = smbus_read_byte(dimm0, SPD_REFRESH); spd_byte0 &= 0xF; @@ -261,7 +261,7 @@ static void set_cas(u8 dimm0, u8 dimm1) { u16 glspeed, dimm_speed; u8 spd_byte = 0xff, casmap0, casmap1; - msr_t msr; + struct msr msr; glspeed = geode_link_speed(); @@ -359,7 +359,7 @@ static void set_latencies(u8 dimm0, u8 dimm1) { u32 memspeed, dimm_setting; u8 spd_byte0, spd_byte1; - msr_t msr; + struct msr msr; memspeed = geode_link_speed() / 2; dimm_setting = 0; @@ -502,7 +502,7 @@ static void set_latencies(u8 dimm0, u8 dimm1) static void set_extended_mode_registers(u8 dimm0, u8 dimm1) { u8 spd_byte0, spd_byte1; - msr_t msr; + struct msr msr; spd_byte0 = smbus_read_byte(dimm0, SPD_DEVICE_ATTRIBUTES_GENERAL); if (spd_byte0 == 0xFF) { spd_byte0 = 0; @@ -528,7 +528,7 @@ static void set_extended_mode_registers(u8 dimm0, u8 dimm1) */ static void EnableMTest(void) { - msr_t msr; + struct msr msr; msr = rdmsr(GLCP_DELAY_CONTROLS); msr.hi &= ~(7 << 20); /* clear bits 54:52 */ @@ -552,7 +552,7 @@ static void EnableMTest(void) */ void sdram_set_registers(void) { - msr_t msr; + struct msr msr; u32 msrnum; /* Set Timing Control */ @@ -653,7 +653,7 @@ void sdram_set_spd_registers(u8 dimm0, u8 dimm1) void sdram_enable(u8 dimm0, u8 dimm1) { u32 i, msrnum; - msr_t msr; + struct msr msr; post_code(POST_MEM_ENABLE); // post_76h