diff --git a/src/cpu/p5/cpuid.c b/src/cpu/p5/cpuid.c index 23a8d50cb0..8a0925fd12 100644 --- a/src/cpu/p5/cpuid.c +++ b/src/cpu/p5/cpuid.c @@ -35,6 +35,7 @@ int intel_mtrr_check(void) DBG("\n"); + intel_post(0x93); return ((int) low); } #endif @@ -216,4 +217,5 @@ void intel_display_cpuid(void) } DBG("\n"); + intel_post(0x92); } diff --git a/src/cpu/p6/mtrr.c b/src/cpu/p6/mtrr.c index 8ba8606caa..6052c206b9 100644 --- a/src/cpu/p6/mtrr.c +++ b/src/cpu/p6/mtrr.c @@ -41,6 +41,8 @@ static unsigned int mtrr_msr[] = { MTRRfix4K_E0000_MSR, MTRRfix4K_E8000_MSR, MTRRfix4K_F0000_MSR, MTRRfix4K_F8000_MSR, }; +#ifndef HAVE_MTRR_TABLE + static unsigned char fixed_mtrr_values[][4] = { /* MTRRfix64K_00000_MSR, defines memory range from 0KB to 512 KB, each byte cover 64KB area */ {MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK, MTRR_TYPE_WRBACK}, @@ -87,6 +89,10 @@ static unsigned char fixed_mtrr_values[][4] = { {MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH, MTRR_TYPE_WRTHROUGH}, }; +#else +extern unsigned char fixed_mtrr_values[][4]; +#endif + void intel_enable_fixed_mtrr() { @@ -238,6 +244,7 @@ void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK) #else /* ENABLE_FIXED_AND_VARIABLE_MTRRS */ void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK) { + DBG("\n"); intel_set_var_mtrr(0, 0, ramsizeK * 1024, MTRR_TYPE_WRBACK); intel_enable_var_mtrr(); } diff --git a/src/lib/subr.c b/src/lib/subr.c index 638b7ece01..4bd71ce540 100644 --- a/src/lib/subr.c +++ b/src/lib/subr.c @@ -161,6 +161,9 @@ void intel_interrupts_on() #define LVT1 0xfee00350 #define LVT2 0xfee00360 #define APIC_ENABLED 0x100 + + printk(KERN_INFO "Enabling interrupts..."); + regp = (unsigned long *) SVR; reg = *regp; reg &= (~0xf0); @@ -180,11 +183,16 @@ void intel_interrupts_on() *regp = reg; #else unsigned long low, high; + + printk(KERN_INFO "Enabling interrupts..."); + rdmsr(0x1b, low, high); low &= ~0x800; wrmsr(0x1b, low, high); #endif + printk(KERN_INFO "done.\n"); + intel_post(0x9b); } @@ -194,6 +202,8 @@ void intel_zero_irq_settings(void) struct pci_dev *pcidev; unsigned char line; + printk(KERN_INFO "Zeroing IRQ settings..."); + pcidev = pci_devices; while (pcidev) { @@ -203,6 +213,7 @@ void intel_zero_irq_settings(void) } pcidev = pcidev->next; } + printk(KERN_INFO "done.\n"); } void intel_check_irq_routing_table(void) @@ -213,6 +224,8 @@ void intel_check_irq_routing_table(void) int i; u8 sum; + printk(KERN_INFO "Checking IRQ routing tables..."); + rt = &intel_irq_routing_table; addr = (u8 *)rt; @@ -248,6 +261,8 @@ void intel_check_irq_routing_table(void) "checksum error in irq routing table\n", __FILE__, __LINE__, __FUNCTION__); } + + printk(KERN_INFO "done.\n"); #endif /* #ifdef HAVE_PIRQ_TABLE */ } @@ -256,7 +271,9 @@ void intel_check_irq_routing_table(void) void intel_copy_irq_routing_table(void) { #ifdef HAVE_PIRQ_TABLE + printk(KERN_INFO "Copying IRQ routing tables..."); memcpy((char *) RTABLE_DEST, &intel_irq_routing_table, intel_irq_routing_table.size); + printk(KERN_INFO "done.\n"); #endif } diff --git a/src/mainboard/gigabit/ga-6bxc/Config b/src/mainboard/gigabit/ga-6bxc/Config index 66acee8246..4a7866883c 100644 --- a/src/mainboard/gigabit/ga-6bxc/Config +++ b/src/mainboard/gigabit/ga-6bxc/Config @@ -4,12 +4,14 @@ southbridge intel/piix4e superio ITE/it8671f option ENABLE_FIXED_AND_VARIABLE_MTRRS -option FINAL_MAINBOARD_FIXUP option HAVE_PIRQ_TABLE +option HAVE_MTRR_TABLE option PIIX4_DEVFN=0x38 +option MAINBOARD_FIXUP_IN_CHARGE object mainboard.o object irq_tables.o +object mtrr_table.o cpu p5 cpu p6 diff --git a/src/mainboard/gigabit/ga-6bxc/ga-6bxc.config.example b/src/mainboard/gigabit/ga-6bxc/ga-6bxc.config.example index 54e1b2a9ff..e4198d62d7 100644 --- a/src/mainboard/gigabit/ga-6bxc/ga-6bxc.config.example +++ b/src/mainboard/gigabit/ga-6bxc/ga-6bxc.config.example @@ -11,10 +11,9 @@ option SERIAL_CONSOLE option NO_KEYBOARD # Enable MicroCode update and L2 Cache init for PII and PIII -#option UPDATE_MICROCODE +option UPDATE_MICROCODE #option CONFIGURE_L2_CACHE -option GA6BXC_256M option INBUF_COPY option DEFAULT_CONSOLE_LOGLEVEL=9 option DEBUG @@ -23,4 +22,4 @@ option DEBUG linux ~/proj/BIOS/freebios/linux # Kernel command line parameters -commandline root=/dev/hda1 console=ttyS0,1152000 FS_MODE=ro hda=flash hdb=flash +commandline root=/dev/hda6 console=ttyS0,115200 FS_MODE=ro hda=flash hdb=flash diff --git a/src/mainboard/gigabit/ga-6bxc/mainboard.c b/src/mainboard/gigabit/ga-6bxc/mainboard.c index 627d87da60..d5353e2ce1 100644 --- a/src/mainboard/gigabit/ga-6bxc/mainboard.c +++ b/src/mainboard/gigabit/ga-6bxc/mainboard.c @@ -2,11 +2,16 @@ #include #include +#include void mainboard_fixup() { -} + nvram_on(); -void final_mainboard_fixup() -{ + intel_display_cpuid(); + intel_mtrr_check(); + + intel_zero_irq_settings(); + intel_check_irq_routing_table(); + intel_interrupts_on(); } diff --git a/src/northbridge/intel/440bx/raminit.inc b/src/northbridge/intel/440bx/raminit.inc index 51f86235d4..ec9a2b3d6b 100644 --- a/src/northbridge/intel/440bx/raminit.inc +++ b/src/northbridge/intel/440bx/raminit.inc @@ -1,4 +1,6 @@ -// TODO: take out GA-6BXC references + +#define RAM_256M + #if 0 /* CAS latency 2 */ #define CAS_NB 0x17 @@ -11,7 +13,7 @@ /* 1 or 2 dimms */ -#ifdef GA6BXC_256M +#ifdef RAM_256M #define DRB 0x20 #define DIMM2_READ2 mov 0x08002000, %eax @@ -150,7 +152,7 @@ CS_WRITE($0x57, $0x09) /* DRAMC */ -#ifdef GA6BXC_256M +#ifdef RAM_256M mov $0x40, %ecx mov $0x8000000, %ebx 1: diff --git a/src/southbridge/intel/piix4e/southbridge.c b/src/southbridge/intel/piix4e/southbridge.c index c5bb513240..230d460a67 100644 --- a/src/southbridge/intel/piix4e/southbridge.c +++ b/src/southbridge/intel/piix4e/southbridge.c @@ -21,9 +21,13 @@ void nvram_on() struct pci_dev *pcidev; + printk(KERN_INFO "Enabling extended BIOS access..."); + pcidev = pci_find_device(0x8086, 0x7110, (void *)NULL); if (pcidev) pci_write_config_word(pcidev, 0x4e, 0x03c3); + printk(KERN_INFO "done.\n"); + intel_post(0x91); } // Have to talk to Eric Beiderman about this ... @@ -33,6 +37,7 @@ void nvram_on() #ifdef NO_KEYBOARD void keyboard_on() { + intel_post(0x94); } #else void keyboard_on() @@ -75,5 +80,6 @@ void keyboard_on() /* now keyboard should work, ha ha. */ pc_keyboard_init(); + intel_post(0x94); } #endif