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https://github.com/fail0verflow/switch-coreboot.git
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This superio is needed for the kontron.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@997 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich
parent
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commit
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5 changed files with 270 additions and 0 deletions
30
superio/winbond/w83627thg/Makefile
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30
superio/winbond/w83627thg/Makefile
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007 coresystems GmbH
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## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifeq ($(CONFIG_SUPERIO_WINBOND_W83627THG),y)
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STAGE0_CHIPSET_SRC += $(src)/superio/winbond/w83627thg/stage1.c
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STAGE0_CHIPSET_SRC += $(src)/device/pnp_raw.c
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# Always add to variables, as there could be more than one Super I/O.
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STAGE2_CHIPSET_SRC += $(src)/superio/winbond/w83627thg/superio.c
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endif
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44
superio/winbond/w83627thg/dts
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44
superio/winbond/w83627thg/dts
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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{
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device_operations = "w83627thg_ops";
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/* To override any of these, put the over-ride in mainboard dts. */
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/* COM1 */
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com1dev = "2";
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com1enable = "0";
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com1io = "0x3f8";
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com1irq = "4";
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/* COM2 */
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com2dev = "3";
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com2enable = "0";
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com2io = "0x2f8";
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com2irq = "3";
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/* Keyboard */
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kbdev = "5";
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kbenable = "0";
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kbio = "0x60";
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kbio2 = "0x62";
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kbirq = "1";
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kbirq2 = "12";
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};
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45
superio/winbond/w83627thg/stage1.c
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45
superio/winbond/w83627thg/stage1.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2000 AG Electronics Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <io.h>
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#include <device/pnp.h>
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#include "w83627thg.h"
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static inline void pnp_enter_ext_func_mode(device_t dev)
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{
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unsigned int port = dev >> 8;
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outb(0x87, port);
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outb(0x87, port);
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}
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static void pnp_exit_ext_func_mode(device_t dev)
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{
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unsigned int port = dev >> 8;
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outb(0xaa, port);
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}
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static void w83627thg_enable_serial(device_t dev, unsigned int iobase)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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pnp_exit_ext_func_mode(dev);
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}
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122
superio/winbond/w83627thg/superio.c
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122
superio/winbond/w83627thg/superio.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2000 AG Electronics Ltd.
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* Copyright 2003-2004 Linux Networx
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* Copyright 2004 Tyan
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <io.h>
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#include <lib.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <console.h>
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#include <string.h>
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//#include <bitops.h>
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#include <uart8250.h>
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#include <keyboard.h>
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// #include <pc80/mc146818rtc.h>
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#include <statictree.h>
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#include "w83627hf.h"
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static void w83627thg_enter_ext_func_mode(struct device * dev)
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{
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outb(0x87, dev->path.u.pnp.port);
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outb(0x87, dev->path.u.pnp.port);
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}
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static void w83627thg_exit_ext_func_mode(struct device * dev)
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{
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outb(0xaa, dev->path.u.pnp.port);
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}
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static void w83627thg_init(struct device * dev)
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{
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struct superio_winbond_w83627thg_config *conf;
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struct resource *res0, *res1;
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/* Wishlist handle well known programming interfaces more
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* generically.
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*/
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if (!dev->enabled) {
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return;
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}
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conf = dev->device_configuration;
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switch(dev->path.u.pnp.device) {
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case W83627THG_SP1:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_uart8250(res0->base, &conf->com1);
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break;
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case W83627THG_SP2:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_uart8250(res0->base, &conf->com2);
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break;
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case W83627THG_KBC:
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res0 = find_resource(dev, PNP_IDX_IO0);
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res1 = find_resource(dev, PNP_IDX_IO1);
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init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
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break;
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}
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}
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static void w83627thg_set_resources(struct device * dev)
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{
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w83627thg_enter_ext_func_mode(dev);
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pnp_set_resources(dev);
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w83627thg_exit_ext_func_mode(dev);
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}
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static void w83627thg_enable_resources(struct device * dev)
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{
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w83627thg_enter_ext_func_mode(dev);
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pnp_enable_resources(dev);
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w83627thg_exit_ext_func_mode(dev);
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}
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static void w83627thg_enable(struct device * dev)
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{
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w83627thg_enter_ext_func_mode(dev);
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pnp_enable(dev);
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w83627thg_exit_ext_func_mode(dev);
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}
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static void phase3_chip_setup_dev(struct device *dev);
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static struct device_operations w83627thg_ops = {
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.phase3_chip_setup_dev = phase3_chip_setup_dev,
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.phase3_enable = w83627thg_enable,
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.phase4_read_resources = pnp_read_resources,
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.phase4_set_resources = w83627thg_set_resources,
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.phase5_enable_resources = w83627thg_enable_resources,
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.enable = ,
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.init = w83627thg_init,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, W83627THG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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{ &ops, W83627THG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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// No 4 { 0,},
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{ &ops, W83627THG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
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{ &ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
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{ &ops, W83627THG_GPIO2,},
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{ &ops, W83627THG_GPIO3,},
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{ &ops, W83627THG_ACPI, PNP_IRQ0, },
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{ &ops, W83627THG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
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};
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static void phase3_chip_setup_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &w83627thg_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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29
superio/winbond/w83627thg/w83627thg.h
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29
superio/winbond/w83627thg/w83627thg.h
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2000 AG Electronics Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define W83627THG_FDC 0 /* Floppy */
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#define W83627THG_PP 1 /* Parallel Port */
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#define W83627THG_SP1 2 /* Com1 */
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#define W83627THG_SP2 3 /* Com2 */
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#define W83627THG_KBC 5 /* Keyboard & Mouse */
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#define W83627THG_GAME_MIDI_GPIO1 7
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#define W83627THG_GPIO2 8
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#define W83627THG_GPIO3 9
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#define W83627THG_ACPI 10
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#define W83627THG_HWM 11 /* Hardware Monitor */
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