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UPSTREAM: soc/intel/apollolake: use fast_spi_cache_bios_region()

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The fast_spi_cache_bios_region() does the necessary lookup
of BIOS region size, etc. Don't inline the calculation and
just defer to the common piece of code for memory-mapped
spi flash boot.

BUG=none
BRANCH=none
TEST=none

Change-Id: I47744f71cad87b908f8f672930c6c4d1716e04c7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: efc92a86c2
Original-Change-Id: I6c390aa5a57244308016cd59679d8c3ab02031b8
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/20116
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/531701
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Aaron Durbin 2017-06-08 10:54:59 -05:00 • committed by chrome-bot
parent 6a5c7cd5fd
commit a99b63c8a1
1 changed files with 4 additions and 3 deletions
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7
src/soc/intel/apollolake/cpu.c
View file

@ -25,6 +25,7 @@
#include <cpu/x86/mtrr.h>
#include <device/device.h>
#include <device/pci.h>
#include <intelblocks/fast_spi.h>
#include <reg_script.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
@ -205,7 +206,7 @@ void apollolake_init_cpus(device_t dev)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Temporarily cache the memory-mapped boot media. */
if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
mtrr_use_temp_range(-CONFIG_ROM_SIZE, CONFIG_ROM_SIZE,
MTRR_TYPE_WRPROT);
if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED) &&
IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
fast_spi_cache_bios_region();
}