Emulation/switch-coreboot
1
0
Fork 0
mirror of https://github.com/fail0verflow/switch-coreboot.git synced 2025-05-04 01:39:18 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

UPSTREAM: drivers/intel/fsp2_0: Ensure EC is in right mode before memory init

Browse source 
If EC_GOOGLE_CHROMEEC is enabled, ensure that the EC is in correct mode
before running memory init. This saves additional memory training
required in recovery path because of reboot later in ramstage.

BUG=chrome-os-partner:54245
BRANCH=None
TEST=None

Change-Id: I95b25327e4ec8b3c8784dbd34ff150c8c82864ea
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/16034
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/368712
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Furquan Shaikh 2016-08-02 14:04:59 -07:00 • committed by chrome-bot
parent 1245914e4b
commit a951d4dba2
1 changed files with 9 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
src/drivers/intel/fsp2_0/memory_init.c
View file

@ -17,6 +17,7 @@
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <elog.h>
#include <fsp/api.h>
#include <fsp/util.h>
@ -295,6 +296,14 @@ void fsp_memory_init(bool s3wake)
if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake)
boot_count_increment();
/*
* Before doing any memory init/training, ensure that the EC is in the
* right mode. This saves an additional memory training when in recovery
* mode.
*/
if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
google_chromeec_early_init();
if (cbfs_boot_locate(&file_desc, name, NULL)) {
printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name);
die("FSPM not available!\n");