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We shouldn't assume the presence of a working HDA codec, so put in

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a reasonable timeout of 50usecs (timeout value borrowed from the kernel).
This makes SimNow work, since apparently though the codec is 
present in Simnow, it is non functional.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@904 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-10-07 00:29:36 +00:00
parent 0094f61888
commit a76e76a6e1
1 changed files with 34 additions and 12 deletions
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46
southbridge/amd/sb600/hda.c
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@ -162,6 +162,32 @@ static unsigned find_verb(u32 viddid, u32 ** verb)
return sizeof(cim_verb_data) / sizeof(u32); return sizeof(cim_verb_data) / sizeof(u32);
} }
static int wait_for_ready(u8 *base)
{
int timeout = 50;
while(timeout--) {
u32 dword=readl(base + 0x68);
if (!(dword & 1))
return 0;
udelay(1);
}
return -1;
}
static int wait_for_valid(u8 *base)
{
int timeout = 50;
while(timeout--) {
u32 dword = readl(base + 0x68);
if ((dword & 3) == 2)
return 0;
udelay(1);
}
return 1;
}
static void codec_init(u8 * base, int addr) static void codec_init(u8 * base, int addr)
{ {
u32 dword; u32 dword;
@ -170,16 +196,14 @@ static void codec_init(u8 * base, int addr)
int i; int i;
/* 1 */ /* 1 */
do { if (wait_for_ready(base) == -1)
dword = readl(base + 0x68); return;
} while (dword & 1);
dword = (addr << 28) | 0x000f0000; dword = (addr << 28) | 0x000f0000;
writel(dword, base + 0x60); writel(dword, base + 0x60);
do { if (wait_for_valid(base) == -1)
dword = readl(base + 0x68); return;
} while ((dword & 3) != 2);
dword = readl(base + 0x64); dword = readl(base + 0x64);
@ -195,15 +219,13 @@ static void codec_init(u8 * base, int addr)
printk(BIOS_DEBUG, "verb_size: %d\n", verb_size); printk(BIOS_DEBUG, "verb_size: %d\n", verb_size);
/* 3 */ /* 3 */
for (i = 0; i < verb_size; i++) { for (i = 0; i < verb_size; i++) {
do { if (wait_for_ready(base) == -1)
dword = readl(base + 0x68); return;
} while (dword & 1);
writel(verb[i], base + 0x60); writel(verb[i], base + 0x60);
do { if (wait_for_valid(base) == -1)
dword = readl(base + 0x68); return;
} while ((dword & 3) != 2);
} }
printk(BIOS_DEBUG, "verb loaded!\n"); printk(BIOS_DEBUG, "verb loaded!\n");
} }