diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 505632ec76..cd5221742b 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -41,7 +41,8 @@ static u8 pmio_read(u8 reg) return inb(PM_INDEX + 1); } -static void sb700_acpi_init(void) { +static void sb700_acpi_init(void) +{ pmio_write(0x20, ACPI_PM_EVT_BLK & 0xFF); pmio_write(0x21, ACPI_PM_EVT_BLK >> 8); pmio_write(0x22, ACPI_PM1_CNT_BLK & 0xFF); @@ -624,7 +625,8 @@ static int smbus_read_byte(u32 device, u32 address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { +int s3_save_nvram_early(u32 dword, int size, int nvram_pos) +{ int i; printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos); @@ -637,7 +639,8 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { return nvram_pos; } -int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) { +int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) +{ u32 data = *old_dword; int i; for (i = 0; i> 8); pmio_write(0x62, ACPI_PM1_CNT_BLK & 0xFF); @@ -652,7 +653,8 @@ static int smbus_read_byte(u32 device, u32 address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { +int s3_save_nvram_early(u32 dword, int size, int nvram_pos) +{ int i; printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos); @@ -665,7 +667,8 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { return nvram_pos; } -int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) { +int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) +{ u32 data = *old_dword; int i; for (i = 0; i