mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
add sdram config 4
This commit is contained in:
Shawn Hoffman
Andre Heider
parent
4dab24a8f8
commit
a4222294ca
4 changed files with 952 additions and 0 deletions
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@ -18,6 +18,7 @@ bct-cfg-y += sdram-nintendo-switch-0.cfg
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bct-cfg-y += sdram-nintendo-switch-1.cfg
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bct-cfg-y += sdram-nintendo-switch-2.cfg
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bct-cfg-y += sdram-nintendo-switch-3.cfg
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bct-cfg-y += sdram-nintendo-switch-4.cfg
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# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
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# the include files (sdram-*.inc) by running "./cfg2inc.sh sdram-*.cfg".
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474
src/mainboard/nintendo/switch/bct/sdram-nintendo-switch-4.cfg
Normal file
474
src/mainboard/nintendo/switch/bct/sdram-nintendo-switch-4.cfg
Normal file
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@ -0,0 +1,474 @@
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SDRAM[0].MemoryType = NvBootMemoryType_LpDdr4;
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SDRAM[0].PllMInputDivider = 0x00000001;
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SDRAM[0].PllMFeedbackDivider = 0x00000022;
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SDRAM[0].PllMStableTime = 0x0000012c;
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SDRAM[0].PllMSetupControl = 0x00000000;
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SDRAM[0].PllMPostDivider = 0x00000000;
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SDRAM[0].PllMKCP = 0x00000000;
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SDRAM[0].PllMKVCO = 0x00000000;
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SDRAM[0].EmcBctSpare0 = 0x00000000;
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SDRAM[0].EmcBctSpare1 = 0x00000000;
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SDRAM[0].EmcBctSpare2 = 0x00000000;
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SDRAM[0].EmcBctSpare3 = 0x00000000;
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SDRAM[0].EmcBctSpare4 = 0x7001bc68;
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SDRAM[0].EmcBctSpare5 = 0x0000000a;
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SDRAM[0].EmcBctSpare6 = 0x7001b404;
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SDRAM[0].EmcBctSpare7 = 0x76543201;
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SDRAM[0].EmcBctSpare8 = 0x7000e6c8;
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SDRAM[0].EmcBctSpare9 = 0x00000000;
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SDRAM[0].EmcBctSpare10 = 0x00000000;
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SDRAM[0].EmcBctSpare11 = 0x00000000;
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SDRAM[0].EmcBctSpare12 = 0x00000000;
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SDRAM[0].EmcBctSpare13 = 0x00000034;
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SDRAM[0].EmcClockSource = 0x40188002;
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SDRAM[0].EmcClockSourceDll = 0x40000000;
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SDRAM[0].ClkRstControllerPllmMisc2Override = 0x00000000;
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SDRAM[0].ClkRstControllerPllmMisc2OverrideEnable = 0x00000000;
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SDRAM[0].ClearClk2Mc1 = 0x00000000;
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SDRAM[0].EmcAutoCalInterval = 0x001fffff;
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SDRAM[0].EmcAutoCalConfig = 0xa01a51d8;
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SDRAM[0].EmcAutoCalConfig2 = 0x05500000;
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SDRAM[0].EmcAutoCalConfig3 = 0x00770000;
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SDRAM[0].EmcAutoCalConfig4 = 0x00770000;
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SDRAM[0].EmcAutoCalConfig5 = 0x00770000;
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SDRAM[0].EmcAutoCalConfig6 = 0x00770000;
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SDRAM[0].EmcAutoCalConfig7 = 0x00770000;
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SDRAM[0].EmcAutoCalConfig8 = 0x00770000;
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SDRAM[0].EmcAutoCalVrefSel0 = 0xb3afa6a6;
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SDRAM[0].EmcAutoCalVrefSel1 = 0x00009e3c;
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SDRAM[0].EmcAutoCalChannel = 0xc1e00303;
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SDRAM[0].EmcPmacroAutocalCfg0 = 0x04040404;
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SDRAM[0].EmcPmacroAutocalCfg1 = 0x04040404;
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SDRAM[0].EmcPmacroAutocalCfg2 = 0x00000000;
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SDRAM[0].EmcPmacroRxTerm = 0x1f1f1f1f;
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SDRAM[0].EmcPmacroDqTxDrv = 0x1f1f1f1f;
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SDRAM[0].EmcPmacroCaTxDrv = 0x1f1f1f1f;
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SDRAM[0].EmcPmacroCmdTxDrv = 0x00001f1f;
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SDRAM[0].EmcPmacroAutocalCfgCommon = 0x00000804;
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SDRAM[0].EmcPmacroZctrl = 0x00000550;
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SDRAM[0].EmcAutoCalWait = 0x000001a1;
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SDRAM[0].EmcXm2CompPadCtrl = 0x00000032;
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SDRAM[0].EmcXm2CompPadCtrl2 = 0x00000000;
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SDRAM[0].EmcXm2CompPadCtrl3 = 0x00000000;
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SDRAM[0].EmcAdrCfg = 0x00000001;
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SDRAM[0].EmcPinProgramWait = 0x00000002;
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SDRAM[0].EmcPinExtraWait = 0x00000000;
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SDRAM[0].EmcPinGpioEn = 0x00000003;
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SDRAM[0].EmcPinGpio = 0x00000003;
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SDRAM[0].EmcTimingControlWait = 0x0000001e;
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SDRAM[0].EmcRc = 0x0000000d;
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SDRAM[0].EmcRfc = 0x00000025;
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SDRAM[0].EmcRfcPb = 0x00000013;
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SDRAM[0].EmcRefctrl2 = 0x00000000;
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SDRAM[0].EmcRfcSlr = 0x00000000;
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SDRAM[0].EmcRas = 0x00000009;
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SDRAM[0].EmcRp = 0x00000004;
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SDRAM[0].EmcR2r = 0x00000000;
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SDRAM[0].EmcW2w = 0x00000000;
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SDRAM[0].EmcR2w = 0x0000000b;
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SDRAM[0].EmcW2r = 0x0000000d;
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SDRAM[0].EmcR2p = 0x00000008;
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SDRAM[0].EmcW2p = 0x0000000b;
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SDRAM[0].EmcTppd = 0x00000004;
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SDRAM[0].EmcCcdmw = 0x00000020;
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SDRAM[0].EmcRdRcd = 0x00000006;
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SDRAM[0].EmcWrRcd = 0x00000006;
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SDRAM[0].EmcRrd = 0x00000006;
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SDRAM[0].EmcRext = 0x00000003;
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SDRAM[0].EmcWext = 0x00000000;
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SDRAM[0].EmcWdv = 0x00000004;
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SDRAM[0].EmcWdvChk = 0x00000006;
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SDRAM[0].EmcWsv = 0x00000002;
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SDRAM[0].EmcWev = 0x00000000;
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SDRAM[0].EmcWdvMask = 0x00000004;
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SDRAM[0].EmcWsDuration = 0x00000008;
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SDRAM[0].EmcWeDuration = 0x0000000d;
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SDRAM[0].EmcQUse = 0x00000005;
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SDRAM[0].EmcQuseWidth = 0x00000006;
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SDRAM[0].EmcIbdly = 0x00000000;
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SDRAM[0].EmcObdly = 0x00000000;
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SDRAM[0].EmcEInput = 0x00000002;
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SDRAM[0].EmcEInputDuration = 0x0000000d;
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SDRAM[0].EmcPutermExtra = 0x00000000;
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SDRAM[0].EmcPutermWidth = 0x0000000b;
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SDRAM[0].EmcQRst = 0x00010000;
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SDRAM[0].EmcQSafe = 0x00000012;
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SDRAM[0].EmcRdv = 0x00000014;
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SDRAM[0].EmcRdvMask = 0x00000016;
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SDRAM[0].EmcRdvEarly = 0x00000012;
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SDRAM[0].EmcRdvEarlyMask = 0x00000014;
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SDRAM[0].EmcQpop = 0x0000000a;
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SDRAM[0].EmcRefresh = 0x00000304;
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SDRAM[0].EmcBurstRefreshNum = 0x00000000;
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SDRAM[0].EmcPreRefreshReqCnt = 0x000000c1;
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SDRAM[0].EmcPdEx2Wr = 0x00000008;
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SDRAM[0].EmcPdEx2Rd = 0x00000008;
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SDRAM[0].EmcPChg2Pden = 0x00000003;
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SDRAM[0].EmcAct2Pden = 0x00000003;
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SDRAM[0].EmcAr2Pden = 0x00000003;
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SDRAM[0].EmcRw2Pden = 0x00000014;
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SDRAM[0].EmcCke2Pden = 0x00000005;
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SDRAM[0].EmcPdex2Cke = 0x00000002;
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SDRAM[0].EmcPdex2Mrr = 0x0000000d;
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SDRAM[0].EmcTxsr = 0x00000027;
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SDRAM[0].EmcTxsrDll = 0x00000027;
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SDRAM[0].EmcTcke = 0x00000005;
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SDRAM[0].EmcTckesr = 0x00000005;
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SDRAM[0].EmcTpd = 0x00000004;
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SDRAM[0].EmcTfaw = 0x00000009;
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SDRAM[0].EmcTrpab = 0x00000005;
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SDRAM[0].EmcTClkStable = 0x00000004;
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SDRAM[0].EmcTClkStop = 0x00000009;
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SDRAM[0].EmcTRefBw = 0x0000031c;
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SDRAM[0].EmcFbioCfg5 = 0x9160a00d;
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SDRAM[0].EmcFbioCfg7 = 0x00003bbf;
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SDRAM[0].EmcFbioCfg8 = 0x0cf30000;
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SDRAM[0].EmcCmdMappingCmd0_0 = 0x061b0504;
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SDRAM[0].EmcCmdMappingCmd0_1 = 0x1c070302;
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SDRAM[0].EmcCmdMappingCmd0_2 = 0x05252523;
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SDRAM[0].EmcCmdMappingCmd1_0 = 0x0a091d08;
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SDRAM[0].EmcCmdMappingCmd1_1 = 0x0d1e0b24;
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SDRAM[0].EmcCmdMappingCmd1_2 = 0x0326260c;
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SDRAM[0].EmcCmdMappingCmd2_0 = 0x231c1b02;
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SDRAM[0].EmcCmdMappingCmd2_1 = 0x05070403;
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SDRAM[0].EmcCmdMappingCmd2_2 = 0x02252506;
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SDRAM[0].EmcCmdMappingCmd3_0 = 0x0d1d0b0a;
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SDRAM[0].EmcCmdMappingCmd3_1 = 0x1e090c08;
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SDRAM[0].EmcCmdMappingCmd3_2 = 0x08262624;
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SDRAM[0].EmcCmdMappingByte = 0x9a070624;
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SDRAM[0].EmcFbioSpare = 0x00000012;
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SDRAM[0].EmcCfgRsv = 0xff00ff00;
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SDRAM[0].EmcMrs = 0x00000000;
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SDRAM[0].EmcEmrs = 0x00000000;
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SDRAM[0].EmcEmrs2 = 0x00000000;
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SDRAM[0].EmcEmrs3 = 0x00000000;
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SDRAM[0].EmcMrw1 = 0x08010004;
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SDRAM[0].EmcMrw2 = 0x08020000;
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SDRAM[0].EmcMrw3 = 0x080d0000;
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SDRAM[0].EmcMrw4 = 0xc0000000;
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SDRAM[0].EmcMrw6 = 0x08037171;
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SDRAM[0].EmcMrw8 = 0x080b0000;
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SDRAM[0].EmcMrw9 = 0x0c0e7272;
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SDRAM[0].EmcMrw10 = 0x00000000;
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SDRAM[0].EmcMrw12 = 0x0c0d0808;
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SDRAM[0].EmcMrw13 = 0x0c0d0000;
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SDRAM[0].EmcMrw14 = 0x08161414;
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SDRAM[0].EmcMrwExtra = 0x08010004;
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SDRAM[0].EmcWarmBootMrwExtra = 0x08110000;
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SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000001;
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SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000;
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SDRAM[0].EmcMrwResetCommand = 0x00000000;
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SDRAM[0].EmcMrwResetNInitWait = 0x00000000;
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SDRAM[0].EmcMrsWaitCnt = 0x00cc0015;
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SDRAM[0].EmcMrsWaitCnt2 = 0x0033000a;
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SDRAM[0].EmcCfg = 0xf3200000;
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SDRAM[0].EmcCfg2 = 0x00110805;
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SDRAM[0].EmcCfgPipe = 0x0fff0fff;
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SDRAM[0].EmcCfgPipeClk = 0x00000000;
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SDRAM[0].EmcFdpdCtrlCmdNoRamp = 0x00000001;
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SDRAM[0].EmcCfgUpdate = 0x70000301;
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SDRAM[0].EmcDbg = 0x01000c00;
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SDRAM[0].EmcDbgWriteMux = 0x00000001;
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SDRAM[0].EmcCmdQ = 0x10004408;
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SDRAM[0].EmcMc2EmcQ = 0x06000404;
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SDRAM[0].EmcDynSelfRefControl = 0x80000713;
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SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001;
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SDRAM[0].EmcCfgDigDll = 0x002c00a0;
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SDRAM[0].EmcCfgDigDll_1 = 0x00003701;
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SDRAM[0].EmcCfgDigDllPeriod = 0x00008000;
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SDRAM[0].EmcDevSelect = 0x00000000;
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SDRAM[0].EmcSelDpdCtrl = 0x00040008;
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SDRAM[0].EmcFdpdCtrlDq = 0x8020221f;
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SDRAM[0].EmcFdpdCtrlCmd = 0x0220f40f;
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SDRAM[0].EmcPmacroIbVrefDq_0 = 0x28282828;
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SDRAM[0].EmcPmacroIbVrefDq_1 = 0x28282828;
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SDRAM[0].EmcPmacroIbVrefDqs_0 = 0x11111111;
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SDRAM[0].EmcPmacroIbVrefDqs_1 = 0x11111111;
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SDRAM[0].EmcPmacroIbRxrt = 0x000000be;
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SDRAM[0].EmcCfgPipe1 = 0x0fff0fff;
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SDRAM[0].EmcCfgPipe2 = 0x0fff0fff;
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SDRAM[0].EmcPmacroQuseDdllRank0_0 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank0_1 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank0_2 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank0_3 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank0_4 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank0_5 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank1_0 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank1_1 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank1_2 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank1_3 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank1_4 = 0x00000000;
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SDRAM[0].EmcPmacroQuseDdllRank1_5 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank0_0 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank0_1 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank0_2 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank0_3 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank0_4 = 0x00120014;
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SDRAM[0].EmcPmacroObDdllLongDqRank0_5 = 0x00140010;
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SDRAM[0].EmcPmacroObDdllLongDqRank1_0 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank1_1 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank1_2 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank1_3 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqRank1_4 = 0x00120014;
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SDRAM[0].EmcPmacroObDdllLongDqRank1_5 = 0x00140010;
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SDRAM[0].EmcPmacroObDdllLongDqsRank0_0 = 0x002e0030;
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SDRAM[0].EmcPmacroObDdllLongDqsRank0_1 = 0x00300033;
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SDRAM[0].EmcPmacroObDdllLongDqsRank0_2 = 0x00350033;
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SDRAM[0].EmcPmacroObDdllLongDqsRank0_3 = 0x00320030;
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SDRAM[0].EmcPmacroObDdllLongDqsRank0_4 = 0x00000005;
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SDRAM[0].EmcPmacroObDdllLongDqsRank0_5 = 0x00000000;
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SDRAM[0].EmcPmacroObDdllLongDqsRank1_0 = 0x002e0030;
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SDRAM[0].EmcPmacroObDdllLongDqsRank1_1 = 0x00300033;
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SDRAM[0].EmcPmacroObDdllLongDqsRank1_2 = 0x00350033;
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SDRAM[0].EmcPmacroObDdllLongDqsRank1_3 = 0x00320030;
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SDRAM[0].EmcPmacroObDdllLongDqsRank1_4 = 0x00000005;
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SDRAM[0].EmcPmacroObDdllLongDqsRank1_5 = 0x00000000;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank0_0 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank0_1 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank0_2 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank0_3 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank1_0 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank1_1 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank1_2 = 0x00280028;
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SDRAM[0].EmcPmacroIbDdllLongDqsRank1_3 = 0x00280028;
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SDRAM[0].EmcPmacroDdllLongCmd_0 = 0x00140014;
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SDRAM[0].EmcPmacroDdllLongCmd_1 = 0x00120012;
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SDRAM[0].EmcPmacroDdllLongCmd_2 = 0x00100010;
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SDRAM[0].EmcPmacroDdllLongCmd_3 = 0x00140014;
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SDRAM[0].EmcPmacroDdllLongCmd_4 = 0x00000014;
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SDRAM[0].EmcPmacroDdllShortCmd_0 = 0x00000000;
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SDRAM[0].EmcPmacroDdllShortCmd_1 = 0x00000000;
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SDRAM[0].EmcPmacroDdllShortCmd_2 = 0x00000000;
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SDRAM[0].WarmBootWait = 0x00000001;
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SDRAM[0].EmcOdtWrite = 0x00000000;
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SDRAM[0].EmcZcalInterval = 0x00064000;
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SDRAM[0].EmcZcalWaitCnt = 0x000900cc;
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SDRAM[0].EmcZcalMrwCmd = 0x0051004f;
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SDRAM[0].EmcMrsResetDll = 0x00000000;
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SDRAM[0].EmcZcalInitDev0 = 0x80000001;
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SDRAM[0].EmcZcalInitDev1 = 0x40000001;
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SDRAM[0].EmcZcalInitWait = 0x00000001;
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SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003;
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SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab;
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SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011;
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SDRAM[0].EmcZqCalLpDdr4WarmBoot = 0x00000001;
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SDRAM[0].EmcZcalWarmBootWait = 0x00000001;
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SDRAM[0].EmcMrsWarmBootEnable = 0x00000001;
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SDRAM[0].EmcMrsResetDllWait = 0x00000000;
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SDRAM[0].EmcMrsExtra = 0x00000000;
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SDRAM[0].EmcWarmBootMrsExtra = 0x00000000;
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SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000;
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SDRAM[0].EmcMrsDdr2DllReset = 0x00000000;
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SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000;
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SDRAM[0].EmcDdr2Wait = 0x00000000;
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SDRAM[0].EmcClkenOverride = 0x00000000;
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SDRAM[0].EmcExtraRefreshNum = 0x00000002;
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SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000;
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SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000;
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SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003;
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SDRAM[0].PmcVddpSel = 0x00000001;
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SDRAM[0].PmcVddpSelWait = 0x00000002;
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SDRAM[0].PmcDdrPwr = 0x0000000f;
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SDRAM[0].PmcDdrCfg = 0x04220100;
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SDRAM[0].PmcIoDpd3Req = 0x4fafffff;
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SDRAM[0].PmcIoDpd3ReqWait = 0x00000001;
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SDRAM[0].PmcIoDpd4ReqWait = 0x00000002;
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SDRAM[0].PmcRegShort = 0x00000000;
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SDRAM[0].PmcNoIoPower = 0x00000000;
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SDRAM[0].PmcDdrCntrlWait = 0x00000000;
|
||||
SDRAM[0].PmcDdrCntrl = 0x0007ff8b;
|
||||
SDRAM[0].EmcAcpdControl = 0x00000000;
|
||||
SDRAM[0].EmcSwizzleRank0Byte0 = 0x76543201;
|
||||
SDRAM[0].EmcSwizzleRank0Byte1 = 0x65324710;
|
||||
SDRAM[0].EmcSwizzleRank0Byte2 = 0x25763410;
|
||||
SDRAM[0].EmcSwizzleRank0Byte3 = 0x25673401;
|
||||
SDRAM[0].EmcSwizzleRank1Byte0 = 0x32647501;
|
||||
SDRAM[0].EmcSwizzleRank1Byte1 = 0x34567201;
|
||||
SDRAM[0].EmcSwizzleRank1Byte2 = 0x56742310;
|
||||
SDRAM[0].EmcSwizzleRank1Byte3 = 0x67324501;
|
||||
SDRAM[0].EmcTxdsrvttgen = 0x00000000;
|
||||
SDRAM[0].EmcDataBrlshft0 = 0x00249249;
|
||||
SDRAM[0].EmcDataBrlshft1 = 0x00249249;
|
||||
SDRAM[0].EmcDqsBrlshft0 = 0x00000000;
|
||||
SDRAM[0].EmcDqsBrlshft1 = 0x00000000;
|
||||
SDRAM[0].EmcCmdBrlshft0 = 0x00000000;
|
||||
SDRAM[0].EmcCmdBrlshft1 = 0x00000000;
|
||||
SDRAM[0].EmcCmdBrlshft2 = 0x0000001b;
|
||||
SDRAM[0].EmcCmdBrlshft3 = 0x0000001b;
|
||||
SDRAM[0].EmcQuseBrlshft0 = 0x00000000;
|
||||
SDRAM[0].EmcQuseBrlshft1 = 0x00000000;
|
||||
SDRAM[0].EmcQuseBrlshft2 = 0x00000000;
|
||||
SDRAM[0].EmcQuseBrlshft3 = 0x00000000;
|
||||
SDRAM[0].EmcDllCfg0 = 0x1f13412f;
|
||||
SDRAM[0].EmcDllCfg1 = 0x00010014;
|
||||
SDRAM[0].EmcPmcScratch1 = 0x4fafffff;
|
||||
SDRAM[0].EmcPmcScratch2 = 0x7fffffff;
|
||||
SDRAM[0].EmcPmcScratch3 = 0x4006d70b;
|
||||
SDRAM[0].EmcPmacroPadCfgCtrl = 0x00020000;
|
||||
SDRAM[0].EmcPmacroVttgenCtrl0 = 0x00030808;
|
||||
SDRAM[0].EmcPmacroVttgenCtrl1 = 0x00015c00;
|
||||
SDRAM[0].EmcPmacroVttgenCtrl2 = 0x00101010;
|
||||
SDRAM[0].EmcPmacroBrickCtrlRfu1 = 0x00001600;
|
||||
SDRAM[0].EmcPmacroCmdBrickCtrlFdpd = 0x00000000;
|
||||
SDRAM[0].EmcPmacroBrickCtrlRfu2 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroDataBrickCtrlFdpd = 0x00000000;
|
||||
SDRAM[0].EmcPmacroBgBiasCtrl0 = 0x00000034;
|
||||
SDRAM[0].EmcPmacroDataPadRxCtrl = 0x00050037;
|
||||
SDRAM[0].EmcPmacroCmdPadRxCtrl = 0x00000000;
|
||||
SDRAM[0].EmcPmacroDataRxTermMode = 0x00000010;
|
||||
SDRAM[0].EmcPmacroCmdRxTermMode = 0x00003000;
|
||||
SDRAM[0].EmcPmacroDataPadTxCtrl = 0x02000111;
|
||||
SDRAM[0].EmcPmacroCommonPadTxCtrl = 0x00000008;
|
||||
SDRAM[0].EmcPmacroCmdPadTxCtrl = 0x0a000000;
|
||||
SDRAM[0].EmcCfg3 = 0x00000040;
|
||||
SDRAM[0].EmcPmacroTxPwrd0 = 0x10000000;
|
||||
SDRAM[0].EmcPmacroTxPwrd1 = 0x08000000;
|
||||
SDRAM[0].EmcPmacroTxPwrd2 = 0x08000000;
|
||||
SDRAM[0].EmcPmacroTxPwrd3 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxPwrd4 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxPwrd5 = 0x00001000;
|
||||
SDRAM[0].EmcConfigSampleDelay = 0x00000020;
|
||||
SDRAM[0].EmcPmacroBrickMapping0 = 0x28091081;
|
||||
SDRAM[0].EmcPmacroBrickMapping1 = 0x44a53293;
|
||||
SDRAM[0].EmcPmacroBrickMapping2 = 0x76678a5b;
|
||||
SDRAM[0].EmcPmacroTxSelClkSrc0 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxSelClkSrc1 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxSelClkSrc2 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxSelClkSrc3 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxSelClkSrc4 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroTxSelClkSrc5 = 0x00000000;
|
||||
SDRAM[0].EmcPmacroDdllBypass = 0xefffefff;
|
||||
SDRAM[0].EmcPmacroDdllPwrd0 = 0xc0c0c0c0;
|
||||
SDRAM[0].EmcPmacroDdllPwrd1 = 0xc0c0c0c0;
|
||||
SDRAM[0].EmcPmacroDdllPwrd2 = 0xdcdcdcdc;
|
||||
SDRAM[0].EmcPmacroCmdCtrl0 = 0x0a0a0a0a;
|
||||
SDRAM[0].EmcPmacroCmdCtrl1 = 0x0a0a0a0a;
|
||||
SDRAM[0].EmcPmacroCmdCtrl2 = 0x0a0a0a0a;
|
||||
SDRAM[0].McEmemAdrCfg = 0x00000001;
|
||||
SDRAM[0].McEmemAdrCfgDev0 = 0x000c0302;
|
||||
SDRAM[0].McEmemAdrCfgDev1 = 0x000c0302;
|
||||
SDRAM[0].McEmemAdrCfgChannelMask = 0xffff2400;
|
||||
SDRAM[0].McEmemAdrCfgBankMask0 = 0x6e574400;
|
||||
SDRAM[0].McEmemAdrCfgBankMask1 = 0x39722800;
|
||||
SDRAM[0].McEmemAdrCfgBankMask2 = 0x4b9c1000;
|
||||
SDRAM[0].McEmemCfg = 0x00001800;
|
||||
SDRAM[0].McEmemArbCfg = 0x08000001;
|
||||
SDRAM[0].McEmemArbOutstandingReq = 0x8000004c;
|
||||
SDRAM[0].McEmemArbRefpbHpCtrl = 0x000a1020;
|
||||
SDRAM[0].McEmemArbRefpbBankCtrl = 0x80001028;
|
||||
SDRAM[0].McEmemArbTimingRcd = 0x00000001;
|
||||
SDRAM[0].McEmemArbTimingRp = 0x00000000;
|
||||
SDRAM[0].McEmemArbTimingRc = 0x00000003;
|
||||
SDRAM[0].McEmemArbTimingRas = 0x00000001;
|
||||
SDRAM[0].McEmemArbTimingFaw = 0x00000002;
|
||||
SDRAM[0].McEmemArbTimingRrd = 0x00000001;
|
||||
SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002;
|
||||
SDRAM[0].McEmemArbTimingWap2Pre = 0x00000005;
|
||||
SDRAM[0].McEmemArbTimingR2R = 0x00000002;
|
||||
SDRAM[0].McEmemArbTimingW2W = 0x00000001;
|
||||
SDRAM[0].McEmemArbTimingR2W = 0x00000004;
|
||||
SDRAM[0].McEmemArbTimingW2R = 0x00000005;
|
||||
SDRAM[0].McEmemArbTimingRFCPB = 0x00000004;
|
||||
SDRAM[0].McEmemArbDaTurns = 0x02020001;
|
||||
SDRAM[0].McEmemArbDaCovers = 0x00030201;
|
||||
SDRAM[0].McEmemArbMisc0 = 0x71c30504;
|
||||
SDRAM[0].McEmemArbMisc1 = 0x70000f0f;
|
||||
SDRAM[0].McEmemArbMisc2 = 0x00000000;
|
||||
SDRAM[0].McEmemArbRing1Throttle = 0x001f0000;
|
||||
SDRAM[0].McEmemArbOverride = 0x10000000;
|
||||
SDRAM[0].McEmemArbOverride1 = 0x00000000;
|
||||
SDRAM[0].McEmemArbRsv = 0xff00ff00;
|
||||
SDRAM[0].McDaCfg0 = 0x00000001;
|
||||
SDRAM[0].McEmemArbTimingCcdmw = 0x00000008;
|
||||
SDRAM[0].McClkenOverride = 0x00008000;
|
||||
SDRAM[0].McStatControl = 0x00000000;
|
||||
SDRAM[0].McVideoProtectBom = 0xfff00000;
|
||||
SDRAM[0].McVideoProtectBomAdrHi = 0x00000000;
|
||||
SDRAM[0].McVideoProtectSizeMb = 0x00000000;
|
||||
SDRAM[0].McVideoProtectVprOverride = 0xe4bac343;
|
||||
SDRAM[0].McVideoProtectVprOverride1 = 0x00001ed3;
|
||||
SDRAM[0].McVideoProtectGpuOverride0 = 0x00000000;
|
||||
SDRAM[0].McVideoProtectGpuOverride1 = 0x00000000;
|
||||
SDRAM[0].McSecCarveoutBom = 0xfff00000;
|
||||
SDRAM[0].McSecCarveoutAdrHi = 0x00000000;
|
||||
SDRAM[0].McSecCarveoutSizeMb = 0x00000000;
|
||||
SDRAM[0].McVideoProtectWriteAccess = 0x00000000;
|
||||
SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1Bom = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1BomHi = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1Size128kb = 0x00000008;
|
||||
SDRAM[0].McGeneralizedCarveout1Access0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1Access1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1Access2 = 0x00300000;
|
||||
SDRAM[0].McGeneralizedCarveout1Access3 = 0x03000000;
|
||||
SDRAM[0].McGeneralizedCarveout1Access4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1ForceInternalAccess0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1ForceInternalAccess1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1ForceInternalAccess2 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1ForceInternalAccess3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1ForceInternalAccess4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout1Cfg0 = 0x04000c76;
|
||||
SDRAM[0].McGeneralizedCarveout2Bom = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2BomHi = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2Size128kb = 0x00000002;
|
||||
SDRAM[0].McGeneralizedCarveout2Access0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2Access1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2Access2 = 0x03000000;
|
||||
SDRAM[0].McGeneralizedCarveout2Access3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2Access4 = 0x00000300;
|
||||
SDRAM[0].McGeneralizedCarveout2ForceInternalAccess0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2ForceInternalAccess1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2ForceInternalAccess2 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2ForceInternalAccess3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2ForceInternalAccess4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout2Cfg0 = 0x0440167e;
|
||||
SDRAM[0].McGeneralizedCarveout3Bom = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3BomHi = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Size128kb = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Access0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Access1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Access2 = 0x03000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Access3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Access4 = 0x00000300;
|
||||
SDRAM[0].McGeneralizedCarveout3ForceInternalAccess0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3ForceInternalAccess1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3ForceInternalAccess2 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3ForceInternalAccess3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3ForceInternalAccess4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout3Cfg0 = 0x04401e7e;
|
||||
SDRAM[0].McGeneralizedCarveout4Bom = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4BomHi = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4Size128kb = 0x00000008;
|
||||
SDRAM[0].McGeneralizedCarveout4Access0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4Access1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4Access2 = 0x00300000;
|
||||
SDRAM[0].McGeneralizedCarveout4Access3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4Access4 = 0x000000c0;
|
||||
SDRAM[0].McGeneralizedCarveout4ForceInternalAccess0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4ForceInternalAccess1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4ForceInternalAccess2 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4ForceInternalAccess3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4ForceInternalAccess4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout4Cfg0 = 0x04002446;
|
||||
SDRAM[0].McGeneralizedCarveout5Bom = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5BomHi = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5Size128kb = 0x00000008;
|
||||
SDRAM[0].McGeneralizedCarveout5Access0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5Access1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5Access2 = 0x00300000;
|
||||
SDRAM[0].McGeneralizedCarveout5Access3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5Access4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5ForceInternalAccess0 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5ForceInternalAccess1 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5ForceInternalAccess2 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5ForceInternalAccess3 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5ForceInternalAccess4 = 0x00000000;
|
||||
SDRAM[0].McGeneralizedCarveout5Cfg0 = 0x04002c46;
|
||||
SDRAM[0].EmcCaTrainingEnable = 0x00000000;
|
||||
SDRAM[0].SwizzleRankByteEncode = 0x000000ec;
|
||||
SDRAM[0].BootRomPatchControl = 0x00000000;
|
||||
SDRAM[0].BootRomPatchData = 0x00000000;
|
||||
SDRAM[0].McMtsCarveoutBom = 0xfff00000;
|
||||
SDRAM[0].McMtsCarveoutAdrHi = 0x00000000;
|
||||
SDRAM[0].McMtsCarveoutSizeMb = 0x00000000;
|
||||
SDRAM[0].McMtsCarveoutRegCtrl = 0x00000000;
|
||||
476
src/mainboard/nintendo/switch/bct/sdram-nintendo-switch-4.inc
Normal file
476
src/mainboard/nintendo/switch/bct/sdram-nintendo-switch-4.inc
Normal file
|
|
@ -0,0 +1,476 @@
|
|||
{ /* generated from sdram-nintendo-switch-4.cfg; do not edit. */
|
||||
.MemoryType = NvBootMemoryType_LpDdr4,
|
||||
.PllMInputDivider = 0x00000001,
|
||||
.PllMFeedbackDivider = 0x00000022,
|
||||
.PllMStableTime = 0x0000012c,
|
||||
.PllMSetupControl = 0x00000000,
|
||||
.PllMPostDivider = 0x00000000,
|
||||
.PllMKCP = 0x00000000,
|
||||
.PllMKVCO = 0x00000000,
|
||||
.EmcBctSpare0 = 0x00000000,
|
||||
.EmcBctSpare1 = 0x00000000,
|
||||
.EmcBctSpare2 = 0x00000000,
|
||||
.EmcBctSpare3 = 0x00000000,
|
||||
.EmcBctSpare4 = 0x7001bc68,
|
||||
.EmcBctSpare5 = 0x0000000a,
|
||||
.EmcBctSpare6 = 0x7001b404,
|
||||
.EmcBctSpare7 = 0x76543201,
|
||||
.EmcBctSpare8 = 0x7000e6c8,
|
||||
.EmcBctSpare9 = 0x00000000,
|
||||
.EmcBctSpare10 = 0x00000000,
|
||||
.EmcBctSpare11 = 0x00000000,
|
||||
.EmcBctSpare12 = 0x00000000,
|
||||
.EmcBctSpare13 = 0x00000034,
|
||||
.EmcClockSource = 0x40188002,
|
||||
.EmcClockSourceDll = 0x40000000,
|
||||
.ClkRstControllerPllmMisc2Override = 0x00000000,
|
||||
.ClkRstControllerPllmMisc2OverrideEnable = 0x00000000,
|
||||
.ClearClk2Mc1 = 0x00000000,
|
||||
.EmcAutoCalInterval = 0x001fffff,
|
||||
.EmcAutoCalConfig = 0xa01a51d8,
|
||||
.EmcAutoCalConfig2 = 0x05500000,
|
||||
.EmcAutoCalConfig3 = 0x00770000,
|
||||
.EmcAutoCalConfig4 = 0x00770000,
|
||||
.EmcAutoCalConfig5 = 0x00770000,
|
||||
.EmcAutoCalConfig6 = 0x00770000,
|
||||
.EmcAutoCalConfig7 = 0x00770000,
|
||||
.EmcAutoCalConfig8 = 0x00770000,
|
||||
.EmcAutoCalVrefSel0 = 0xb3afa6a6,
|
||||
.EmcAutoCalVrefSel1 = 0x00009e3c,
|
||||
.EmcAutoCalChannel = 0xc1e00303,
|
||||
.EmcPmacroAutocalCfg0 = 0x04040404,
|
||||
.EmcPmacroAutocalCfg1 = 0x04040404,
|
||||
.EmcPmacroAutocalCfg2 = 0x00000000,
|
||||
.EmcPmacroRxTerm = 0x1f1f1f1f,
|
||||
.EmcPmacroDqTxDrv = 0x1f1f1f1f,
|
||||
.EmcPmacroCaTxDrv = 0x1f1f1f1f,
|
||||
.EmcPmacroCmdTxDrv = 0x00001f1f,
|
||||
.EmcPmacroAutocalCfgCommon = 0x00000804,
|
||||
.EmcPmacroZctrl = 0x00000550,
|
||||
.EmcAutoCalWait = 0x000001a1,
|
||||
.EmcXm2CompPadCtrl = 0x00000032,
|
||||
.EmcXm2CompPadCtrl2 = 0x00000000,
|
||||
.EmcXm2CompPadCtrl3 = 0x00000000,
|
||||
.EmcAdrCfg = 0x00000001,
|
||||
.EmcPinProgramWait = 0x00000002,
|
||||
.EmcPinExtraWait = 0x00000000,
|
||||
.EmcPinGpioEn = 0x00000003,
|
||||
.EmcPinGpio = 0x00000003,
|
||||
.EmcTimingControlWait = 0x0000001e,
|
||||
.EmcRc = 0x0000000d,
|
||||
.EmcRfc = 0x00000025,
|
||||
.EmcRfcPb = 0x00000013,
|
||||
.EmcRefctrl2 = 0x00000000,
|
||||
.EmcRfcSlr = 0x00000000,
|
||||
.EmcRas = 0x00000009,
|
||||
.EmcRp = 0x00000004,
|
||||
.EmcR2r = 0x00000000,
|
||||
.EmcW2w = 0x00000000,
|
||||
.EmcR2w = 0x0000000b,
|
||||
.EmcW2r = 0x0000000d,
|
||||
.EmcR2p = 0x00000008,
|
||||
.EmcW2p = 0x0000000b,
|
||||
.EmcTppd = 0x00000004,
|
||||
.EmcCcdmw = 0x00000020,
|
||||
.EmcRdRcd = 0x00000006,
|
||||
.EmcWrRcd = 0x00000006,
|
||||
.EmcRrd = 0x00000006,
|
||||
.EmcRext = 0x00000003,
|
||||
.EmcWext = 0x00000000,
|
||||
.EmcWdv = 0x00000004,
|
||||
.EmcWdvChk = 0x00000006,
|
||||
.EmcWsv = 0x00000002,
|
||||
.EmcWev = 0x00000000,
|
||||
.EmcWdvMask = 0x00000004,
|
||||
.EmcWsDuration = 0x00000008,
|
||||
.EmcWeDuration = 0x0000000d,
|
||||
.EmcQUse = 0x00000005,
|
||||
.EmcQuseWidth = 0x00000006,
|
||||
.EmcIbdly = 0x00000000,
|
||||
.EmcObdly = 0x00000000,
|
||||
.EmcEInput = 0x00000002,
|
||||
.EmcEInputDuration = 0x0000000d,
|
||||
.EmcPutermExtra = 0x00000000,
|
||||
.EmcPutermWidth = 0x0000000b,
|
||||
.EmcQRst = 0x00010000,
|
||||
.EmcQSafe = 0x00000012,
|
||||
.EmcRdv = 0x00000014,
|
||||
.EmcRdvMask = 0x00000016,
|
||||
.EmcRdvEarly = 0x00000012,
|
||||
.EmcRdvEarlyMask = 0x00000014,
|
||||
.EmcQpop = 0x0000000a,
|
||||
.EmcRefresh = 0x00000304,
|
||||
.EmcBurstRefreshNum = 0x00000000,
|
||||
.EmcPreRefreshReqCnt = 0x000000c1,
|
||||
.EmcPdEx2Wr = 0x00000008,
|
||||
.EmcPdEx2Rd = 0x00000008,
|
||||
.EmcPChg2Pden = 0x00000003,
|
||||
.EmcAct2Pden = 0x00000003,
|
||||
.EmcAr2Pden = 0x00000003,
|
||||
.EmcRw2Pden = 0x00000014,
|
||||
.EmcCke2Pden = 0x00000005,
|
||||
.EmcPdex2Cke = 0x00000002,
|
||||
.EmcPdex2Mrr = 0x0000000d,
|
||||
.EmcTxsr = 0x00000027,
|
||||
.EmcTxsrDll = 0x00000027,
|
||||
.EmcTcke = 0x00000005,
|
||||
.EmcTckesr = 0x00000005,
|
||||
.EmcTpd = 0x00000004,
|
||||
.EmcTfaw = 0x00000009,
|
||||
.EmcTrpab = 0x00000005,
|
||||
.EmcTClkStable = 0x00000004,
|
||||
.EmcTClkStop = 0x00000009,
|
||||
.EmcTRefBw = 0x0000031c,
|
||||
.EmcFbioCfg5 = 0x9160a00d,
|
||||
.EmcFbioCfg7 = 0x00003bbf,
|
||||
.EmcFbioCfg8 = 0x0cf30000,
|
||||
.EmcCmdMappingCmd0_0 = 0x061b0504,
|
||||
.EmcCmdMappingCmd0_1 = 0x1c070302,
|
||||
.EmcCmdMappingCmd0_2 = 0x05252523,
|
||||
.EmcCmdMappingCmd1_0 = 0x0a091d08,
|
||||
.EmcCmdMappingCmd1_1 = 0x0d1e0b24,
|
||||
.EmcCmdMappingCmd1_2 = 0x0326260c,
|
||||
.EmcCmdMappingCmd2_0 = 0x231c1b02,
|
||||
.EmcCmdMappingCmd2_1 = 0x05070403,
|
||||
.EmcCmdMappingCmd2_2 = 0x02252506,
|
||||
.EmcCmdMappingCmd3_0 = 0x0d1d0b0a,
|
||||
.EmcCmdMappingCmd3_1 = 0x1e090c08,
|
||||
.EmcCmdMappingCmd3_2 = 0x08262624,
|
||||
.EmcCmdMappingByte = 0x9a070624,
|
||||
.EmcFbioSpare = 0x00000012,
|
||||
.EmcCfgRsv = 0xff00ff00,
|
||||
.EmcMrs = 0x00000000,
|
||||
.EmcEmrs = 0x00000000,
|
||||
.EmcEmrs2 = 0x00000000,
|
||||
.EmcEmrs3 = 0x00000000,
|
||||
.EmcMrw1 = 0x08010004,
|
||||
.EmcMrw2 = 0x08020000,
|
||||
.EmcMrw3 = 0x080d0000,
|
||||
.EmcMrw4 = 0xc0000000,
|
||||
.EmcMrw6 = 0x08037171,
|
||||
.EmcMrw8 = 0x080b0000,
|
||||
.EmcMrw9 = 0x0c0e7272,
|
||||
.EmcMrw10 = 0x00000000,
|
||||
.EmcMrw12 = 0x0c0d0808,
|
||||
.EmcMrw13 = 0x0c0d0000,
|
||||
.EmcMrw14 = 0x08161414,
|
||||
.EmcMrwExtra = 0x08010004,
|
||||
.EmcWarmBootMrwExtra = 0x08110000,
|
||||
.EmcWarmBootExtraModeRegWriteEnable = 0x00000001,
|
||||
.EmcExtraModeRegWriteEnable = 0x00000000,
|
||||
.EmcMrwResetCommand = 0x00000000,
|
||||
.EmcMrwResetNInitWait = 0x00000000,
|
||||
.EmcMrsWaitCnt = 0x00cc0015,
|
||||
.EmcMrsWaitCnt2 = 0x0033000a,
|
||||
.EmcCfg = 0xf3200000,
|
||||
.EmcCfg2 = 0x00110805,
|
||||
.EmcCfgPipe = 0x0fff0fff,
|
||||
.EmcCfgPipeClk = 0x00000000,
|
||||
.EmcFdpdCtrlCmdNoRamp = 0x00000001,
|
||||
.EmcCfgUpdate = 0x70000301,
|
||||
.EmcDbg = 0x01000c00,
|
||||
.EmcDbgWriteMux = 0x00000001,
|
||||
.EmcCmdQ = 0x10004408,
|
||||
.EmcMc2EmcQ = 0x06000404,
|
||||
.EmcDynSelfRefControl = 0x80000713,
|
||||
.AhbArbitrationXbarCtrlMemInitDone = 0x00000001,
|
||||
.EmcCfgDigDll = 0x002c00a0,
|
||||
.EmcCfgDigDll_1 = 0x00003701,
|
||||
.EmcCfgDigDllPeriod = 0x00008000,
|
||||
.EmcDevSelect = 0x00000000,
|
||||
.EmcSelDpdCtrl = 0x00040008,
|
||||
.EmcFdpdCtrlDq = 0x8020221f,
|
||||
.EmcFdpdCtrlCmd = 0x0220f40f,
|
||||
.EmcPmacroIbVrefDq_0 = 0x28282828,
|
||||
.EmcPmacroIbVrefDq_1 = 0x28282828,
|
||||
.EmcPmacroIbVrefDqs_0 = 0x11111111,
|
||||
.EmcPmacroIbVrefDqs_1 = 0x11111111,
|
||||
.EmcPmacroIbRxrt = 0x000000be,
|
||||
.EmcCfgPipe1 = 0x0fff0fff,
|
||||
.EmcCfgPipe2 = 0x0fff0fff,
|
||||
.EmcPmacroQuseDdllRank0_0 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank0_1 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank0_2 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank0_3 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank0_4 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank0_5 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank1_0 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank1_1 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank1_2 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank1_3 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank1_4 = 0x00000000,
|
||||
.EmcPmacroQuseDdllRank1_5 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank0_0 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank0_1 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank0_2 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank0_3 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank0_4 = 0x00120014,
|
||||
.EmcPmacroObDdllLongDqRank0_5 = 0x00140010,
|
||||
.EmcPmacroObDdllLongDqRank1_0 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank1_1 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank1_2 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank1_3 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqRank1_4 = 0x00120014,
|
||||
.EmcPmacroObDdllLongDqRank1_5 = 0x00140010,
|
||||
.EmcPmacroObDdllLongDqsRank0_0 = 0x002e0030,
|
||||
.EmcPmacroObDdllLongDqsRank0_1 = 0x00300033,
|
||||
.EmcPmacroObDdllLongDqsRank0_2 = 0x00350033,
|
||||
.EmcPmacroObDdllLongDqsRank0_3 = 0x00320030,
|
||||
.EmcPmacroObDdllLongDqsRank0_4 = 0x00000005,
|
||||
.EmcPmacroObDdllLongDqsRank0_5 = 0x00000000,
|
||||
.EmcPmacroObDdllLongDqsRank1_0 = 0x002e0030,
|
||||
.EmcPmacroObDdllLongDqsRank1_1 = 0x00300033,
|
||||
.EmcPmacroObDdllLongDqsRank1_2 = 0x00350033,
|
||||
.EmcPmacroObDdllLongDqsRank1_3 = 0x00320030,
|
||||
.EmcPmacroObDdllLongDqsRank1_4 = 0x00000005,
|
||||
.EmcPmacroObDdllLongDqsRank1_5 = 0x00000000,
|
||||
.EmcPmacroIbDdllLongDqsRank0_0 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank0_1 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank0_2 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank0_3 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank1_0 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank1_1 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank1_2 = 0x00280028,
|
||||
.EmcPmacroIbDdllLongDqsRank1_3 = 0x00280028,
|
||||
.EmcPmacroDdllLongCmd_0 = 0x00140014,
|
||||
.EmcPmacroDdllLongCmd_1 = 0x00120012,
|
||||
.EmcPmacroDdllLongCmd_2 = 0x00100010,
|
||||
.EmcPmacroDdllLongCmd_3 = 0x00140014,
|
||||
.EmcPmacroDdllLongCmd_4 = 0x00000014,
|
||||
.EmcPmacroDdllShortCmd_0 = 0x00000000,
|
||||
.EmcPmacroDdllShortCmd_1 = 0x00000000,
|
||||
.EmcPmacroDdllShortCmd_2 = 0x00000000,
|
||||
.WarmBootWait = 0x00000001,
|
||||
.EmcOdtWrite = 0x00000000,
|
||||
.EmcZcalInterval = 0x00064000,
|
||||
.EmcZcalWaitCnt = 0x000900cc,
|
||||
.EmcZcalMrwCmd = 0x0051004f,
|
||||
.EmcMrsResetDll = 0x00000000,
|
||||
.EmcZcalInitDev0 = 0x80000001,
|
||||
.EmcZcalInitDev1 = 0x40000001,
|
||||
.EmcZcalInitWait = 0x00000001,
|
||||
.EmcZcalWarmColdBootEnables = 0x00000003,
|
||||
.EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab,
|
||||
.EmcZqCalDdr3WarmBoot = 0x00000011,
|
||||
.EmcZqCalLpDdr4WarmBoot = 0x00000001,
|
||||
.EmcZcalWarmBootWait = 0x00000001,
|
||||
.EmcMrsWarmBootEnable = 0x00000001,
|
||||
.EmcMrsResetDllWait = 0x00000000,
|
||||
.EmcMrsExtra = 0x00000000,
|
||||
.EmcWarmBootMrsExtra = 0x00000000,
|
||||
.EmcEmrsDdr2DllEnable = 0x00000000,
|
||||
.EmcMrsDdr2DllReset = 0x00000000,
|
||||
.EmcEmrsDdr2OcdCalib = 0x00000000,
|
||||
.EmcDdr2Wait = 0x00000000,
|
||||
.EmcClkenOverride = 0x00000000,
|
||||
.EmcExtraRefreshNum = 0x00000002,
|
||||
.EmcClkenOverrideAllWarmBoot = 0x00000000,
|
||||
.McClkenOverrideAllWarmBoot = 0x00000000,
|
||||
.EmcCfgDigDllPeriodWarmBoot = 0x00000003,
|
||||
.PmcVddpSel = 0x00000001,
|
||||
.PmcVddpSelWait = 0x00000002,
|
||||
.PmcDdrPwr = 0x0000000f,
|
||||
.PmcDdrCfg = 0x04220100,
|
||||
.PmcIoDpd3Req = 0x4fafffff,
|
||||
.PmcIoDpd3ReqWait = 0x00000001,
|
||||
.PmcIoDpd4ReqWait = 0x00000002,
|
||||
.PmcRegShort = 0x00000000,
|
||||
.PmcNoIoPower = 0x00000000,
|
||||
.PmcDdrCntrlWait = 0x00000000,
|
||||
.PmcDdrCntrl = 0x0007ff8b,
|
||||
.EmcAcpdControl = 0x00000000,
|
||||
.EmcSwizzleRank0Byte0 = 0x76543201,
|
||||
.EmcSwizzleRank0Byte1 = 0x65324710,
|
||||
.EmcSwizzleRank0Byte2 = 0x25763410,
|
||||
.EmcSwizzleRank0Byte3 = 0x25673401,
|
||||
.EmcSwizzleRank1Byte0 = 0x32647501,
|
||||
.EmcSwizzleRank1Byte1 = 0x34567201,
|
||||
.EmcSwizzleRank1Byte2 = 0x56742310,
|
||||
.EmcSwizzleRank1Byte3 = 0x67324501,
|
||||
.EmcTxdsrvttgen = 0x00000000,
|
||||
.EmcDataBrlshft0 = 0x00249249,
|
||||
.EmcDataBrlshft1 = 0x00249249,
|
||||
.EmcDqsBrlshft0 = 0x00000000,
|
||||
.EmcDqsBrlshft1 = 0x00000000,
|
||||
.EmcCmdBrlshft0 = 0x00000000,
|
||||
.EmcCmdBrlshft1 = 0x00000000,
|
||||
.EmcCmdBrlshft2 = 0x0000001b,
|
||||
.EmcCmdBrlshft3 = 0x0000001b,
|
||||
.EmcQuseBrlshft0 = 0x00000000,
|
||||
.EmcQuseBrlshft1 = 0x00000000,
|
||||
.EmcQuseBrlshft2 = 0x00000000,
|
||||
.EmcQuseBrlshft3 = 0x00000000,
|
||||
.EmcDllCfg0 = 0x1f13412f,
|
||||
.EmcDllCfg1 = 0x00010014,
|
||||
.EmcPmcScratch1 = 0x4fafffff,
|
||||
.EmcPmcScratch2 = 0x7fffffff,
|
||||
.EmcPmcScratch3 = 0x4006d70b,
|
||||
.EmcPmacroPadCfgCtrl = 0x00020000,
|
||||
.EmcPmacroVttgenCtrl0 = 0x00030808,
|
||||
.EmcPmacroVttgenCtrl1 = 0x00015c00,
|
||||
.EmcPmacroVttgenCtrl2 = 0x00101010,
|
||||
.EmcPmacroBrickCtrlRfu1 = 0x00001600,
|
||||
.EmcPmacroCmdBrickCtrlFdpd = 0x00000000,
|
||||
.EmcPmacroBrickCtrlRfu2 = 0x00000000,
|
||||
.EmcPmacroDataBrickCtrlFdpd = 0x00000000,
|
||||
.EmcPmacroBgBiasCtrl0 = 0x00000034,
|
||||
.EmcPmacroDataPadRxCtrl = 0x00050037,
|
||||
.EmcPmacroCmdPadRxCtrl = 0x00000000,
|
||||
.EmcPmacroDataRxTermMode = 0x00000010,
|
||||
.EmcPmacroCmdRxTermMode = 0x00003000,
|
||||
.EmcPmacroDataPadTxCtrl = 0x02000111,
|
||||
.EmcPmacroCommonPadTxCtrl = 0x00000008,
|
||||
.EmcPmacroCmdPadTxCtrl = 0x0a000000,
|
||||
.EmcCfg3 = 0x00000040,
|
||||
.EmcPmacroTxPwrd0 = 0x10000000,
|
||||
.EmcPmacroTxPwrd1 = 0x08000000,
|
||||
.EmcPmacroTxPwrd2 = 0x08000000,
|
||||
.EmcPmacroTxPwrd3 = 0x00000000,
|
||||
.EmcPmacroTxPwrd4 = 0x00000000,
|
||||
.EmcPmacroTxPwrd5 = 0x00001000,
|
||||
.EmcConfigSampleDelay = 0x00000020,
|
||||
.EmcPmacroBrickMapping0 = 0x28091081,
|
||||
.EmcPmacroBrickMapping1 = 0x44a53293,
|
||||
.EmcPmacroBrickMapping2 = 0x76678a5b,
|
||||
.EmcPmacroTxSelClkSrc0 = 0x00000000,
|
||||
.EmcPmacroTxSelClkSrc1 = 0x00000000,
|
||||
.EmcPmacroTxSelClkSrc2 = 0x00000000,
|
||||
.EmcPmacroTxSelClkSrc3 = 0x00000000,
|
||||
.EmcPmacroTxSelClkSrc4 = 0x00000000,
|
||||
.EmcPmacroTxSelClkSrc5 = 0x00000000,
|
||||
.EmcPmacroDdllBypass = 0xefffefff,
|
||||
.EmcPmacroDdllPwrd0 = 0xc0c0c0c0,
|
||||
.EmcPmacroDdllPwrd1 = 0xc0c0c0c0,
|
||||
.EmcPmacroDdllPwrd2 = 0xdcdcdcdc,
|
||||
.EmcPmacroCmdCtrl0 = 0x0a0a0a0a,
|
||||
.EmcPmacroCmdCtrl1 = 0x0a0a0a0a,
|
||||
.EmcPmacroCmdCtrl2 = 0x0a0a0a0a,
|
||||
.McEmemAdrCfg = 0x00000001,
|
||||
.McEmemAdrCfgDev0 = 0x000c0302,
|
||||
.McEmemAdrCfgDev1 = 0x000c0302,
|
||||
.McEmemAdrCfgChannelMask = 0xffff2400,
|
||||
.McEmemAdrCfgBankMask0 = 0x6e574400,
|
||||
.McEmemAdrCfgBankMask1 = 0x39722800,
|
||||
.McEmemAdrCfgBankMask2 = 0x4b9c1000,
|
||||
.McEmemCfg = 0x00001800,
|
||||
.McEmemArbCfg = 0x08000001,
|
||||
.McEmemArbOutstandingReq = 0x8000004c,
|
||||
.McEmemArbRefpbHpCtrl = 0x000a1020,
|
||||
.McEmemArbRefpbBankCtrl = 0x80001028,
|
||||
.McEmemArbTimingRcd = 0x00000001,
|
||||
.McEmemArbTimingRp = 0x00000000,
|
||||
.McEmemArbTimingRc = 0x00000003,
|
||||
.McEmemArbTimingRas = 0x00000001,
|
||||
.McEmemArbTimingFaw = 0x00000002,
|
||||
.McEmemArbTimingRrd = 0x00000001,
|
||||
.McEmemArbTimingRap2Pre = 0x00000002,
|
||||
.McEmemArbTimingWap2Pre = 0x00000005,
|
||||
.McEmemArbTimingR2R = 0x00000002,
|
||||
.McEmemArbTimingW2W = 0x00000001,
|
||||
.McEmemArbTimingR2W = 0x00000004,
|
||||
.McEmemArbTimingW2R = 0x00000005,
|
||||
.McEmemArbTimingRFCPB = 0x00000004,
|
||||
.McEmemArbDaTurns = 0x02020001,
|
||||
.McEmemArbDaCovers = 0x00030201,
|
||||
.McEmemArbMisc0 = 0x71c30504,
|
||||
.McEmemArbMisc1 = 0x70000f0f,
|
||||
.McEmemArbMisc2 = 0x00000000,
|
||||
.McEmemArbRing1Throttle = 0x001f0000,
|
||||
.McEmemArbOverride = 0x10000000,
|
||||
.McEmemArbOverride1 = 0x00000000,
|
||||
.McEmemArbRsv = 0xff00ff00,
|
||||
.McDaCfg0 = 0x00000001,
|
||||
.McEmemArbTimingCcdmw = 0x00000008,
|
||||
.McClkenOverride = 0x00008000,
|
||||
.McStatControl = 0x00000000,
|
||||
.McVideoProtectBom = 0xfff00000,
|
||||
.McVideoProtectBomAdrHi = 0x00000000,
|
||||
.McVideoProtectSizeMb = 0x00000000,
|
||||
.McVideoProtectVprOverride = 0xe4bac343,
|
||||
.McVideoProtectVprOverride1 = 0x00001ed3,
|
||||
.McVideoProtectGpuOverride0 = 0x00000000,
|
||||
.McVideoProtectGpuOverride1 = 0x00000000,
|
||||
.McSecCarveoutBom = 0xfff00000,
|
||||
.McSecCarveoutAdrHi = 0x00000000,
|
||||
.McSecCarveoutSizeMb = 0x00000000,
|
||||
.McVideoProtectWriteAccess = 0x00000000,
|
||||
.McSecCarveoutProtectWriteAccess = 0x00000000,
|
||||
.McGeneralizedCarveout1Bom = 0x00000000,
|
||||
.McGeneralizedCarveout1BomHi = 0x00000000,
|
||||
.McGeneralizedCarveout1Size128kb = 0x00000008,
|
||||
.McGeneralizedCarveout1Access0 = 0x00000000,
|
||||
.McGeneralizedCarveout1Access1 = 0x00000000,
|
||||
.McGeneralizedCarveout1Access2 = 0x00300000,
|
||||
.McGeneralizedCarveout1Access3 = 0x03000000,
|
||||
.McGeneralizedCarveout1Access4 = 0x00000000,
|
||||
.McGeneralizedCarveout1ForceInternalAccess0 = 0x00000000,
|
||||
.McGeneralizedCarveout1ForceInternalAccess1 = 0x00000000,
|
||||
.McGeneralizedCarveout1ForceInternalAccess2 = 0x00000000,
|
||||
.McGeneralizedCarveout1ForceInternalAccess3 = 0x00000000,
|
||||
.McGeneralizedCarveout1ForceInternalAccess4 = 0x00000000,
|
||||
.McGeneralizedCarveout1Cfg0 = 0x04000c76,
|
||||
.McGeneralizedCarveout2Bom = 0x00000000,
|
||||
.McGeneralizedCarveout2BomHi = 0x00000000,
|
||||
.McGeneralizedCarveout2Size128kb = 0x00000002,
|
||||
.McGeneralizedCarveout2Access0 = 0x00000000,
|
||||
.McGeneralizedCarveout2Access1 = 0x00000000,
|
||||
.McGeneralizedCarveout2Access2 = 0x03000000,
|
||||
.McGeneralizedCarveout2Access3 = 0x00000000,
|
||||
.McGeneralizedCarveout2Access4 = 0x00000300,
|
||||
.McGeneralizedCarveout2ForceInternalAccess0 = 0x00000000,
|
||||
.McGeneralizedCarveout2ForceInternalAccess1 = 0x00000000,
|
||||
.McGeneralizedCarveout2ForceInternalAccess2 = 0x00000000,
|
||||
.McGeneralizedCarveout2ForceInternalAccess3 = 0x00000000,
|
||||
.McGeneralizedCarveout2ForceInternalAccess4 = 0x00000000,
|
||||
.McGeneralizedCarveout2Cfg0 = 0x0440167e,
|
||||
.McGeneralizedCarveout3Bom = 0x00000000,
|
||||
.McGeneralizedCarveout3BomHi = 0x00000000,
|
||||
.McGeneralizedCarveout3Size128kb = 0x00000000,
|
||||
.McGeneralizedCarveout3Access0 = 0x00000000,
|
||||
.McGeneralizedCarveout3Access1 = 0x00000000,
|
||||
.McGeneralizedCarveout3Access2 = 0x03000000,
|
||||
.McGeneralizedCarveout3Access3 = 0x00000000,
|
||||
.McGeneralizedCarveout3Access4 = 0x00000300,
|
||||
.McGeneralizedCarveout3ForceInternalAccess0 = 0x00000000,
|
||||
.McGeneralizedCarveout3ForceInternalAccess1 = 0x00000000,
|
||||
.McGeneralizedCarveout3ForceInternalAccess2 = 0x00000000,
|
||||
.McGeneralizedCarveout3ForceInternalAccess3 = 0x00000000,
|
||||
.McGeneralizedCarveout3ForceInternalAccess4 = 0x00000000,
|
||||
.McGeneralizedCarveout3Cfg0 = 0x04401e7e,
|
||||
.McGeneralizedCarveout4Bom = 0x00000000,
|
||||
.McGeneralizedCarveout4BomHi = 0x00000000,
|
||||
.McGeneralizedCarveout4Size128kb = 0x00000008,
|
||||
.McGeneralizedCarveout4Access0 = 0x00000000,
|
||||
.McGeneralizedCarveout4Access1 = 0x00000000,
|
||||
.McGeneralizedCarveout4Access2 = 0x00300000,
|
||||
.McGeneralizedCarveout4Access3 = 0x00000000,
|
||||
.McGeneralizedCarveout4Access4 = 0x000000c0,
|
||||
.McGeneralizedCarveout4ForceInternalAccess0 = 0x00000000,
|
||||
.McGeneralizedCarveout4ForceInternalAccess1 = 0x00000000,
|
||||
.McGeneralizedCarveout4ForceInternalAccess2 = 0x00000000,
|
||||
.McGeneralizedCarveout4ForceInternalAccess3 = 0x00000000,
|
||||
.McGeneralizedCarveout4ForceInternalAccess4 = 0x00000000,
|
||||
.McGeneralizedCarveout4Cfg0 = 0x04002446,
|
||||
.McGeneralizedCarveout5Bom = 0x00000000,
|
||||
.McGeneralizedCarveout5BomHi = 0x00000000,
|
||||
.McGeneralizedCarveout5Size128kb = 0x00000008,
|
||||
.McGeneralizedCarveout5Access0 = 0x00000000,
|
||||
.McGeneralizedCarveout5Access1 = 0x00000000,
|
||||
.McGeneralizedCarveout5Access2 = 0x00300000,
|
||||
.McGeneralizedCarveout5Access3 = 0x00000000,
|
||||
.McGeneralizedCarveout5Access4 = 0x00000000,
|
||||
.McGeneralizedCarveout5ForceInternalAccess0 = 0x00000000,
|
||||
.McGeneralizedCarveout5ForceInternalAccess1 = 0x00000000,
|
||||
.McGeneralizedCarveout5ForceInternalAccess2 = 0x00000000,
|
||||
.McGeneralizedCarveout5ForceInternalAccess3 = 0x00000000,
|
||||
.McGeneralizedCarveout5ForceInternalAccess4 = 0x00000000,
|
||||
.McGeneralizedCarveout5Cfg0 = 0x04002c46,
|
||||
.EmcCaTrainingEnable = 0x00000000,
|
||||
.SwizzleRankByteEncode = 0x000000ec,
|
||||
.BootRomPatchControl = 0x00000000,
|
||||
.BootRomPatchData = 0x00000000,
|
||||
.McMtsCarveoutBom = 0xfff00000,
|
||||
.McMtsCarveoutAdrHi = 0x00000000,
|
||||
.McMtsCarveoutSizeMb = 0x00000000,
|
||||
.McMtsCarveoutRegCtrl = 0x00000000,
|
||||
},
|
||||
|
|
@ -23,6 +23,7 @@ static const struct sdram_params sdram_configs[] = {
|
|||
#include "bct/sdram-nintendo-switch-1.inc" /* ram_code = 0001 */
|
||||
#include "bct/sdram-nintendo-switch-2.inc" /* ram_code = 0010 */
|
||||
#include "bct/sdram-nintendo-switch-3.inc" /* ram_code = 0011 */
|
||||
#include "bct/sdram-nintendo-switch-4.inc" /* ram_code = 0100 */
|
||||
};
|
||||
|
||||
#define TEGRA_FUSE_BASE ((void *) 0x7000f800)
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue