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UPSTREAM: mainboard/google/poppy: Enable Maxim MAX98927 codec

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Enable Maxim 98927 codec i2c device and add required
SSDT parameters.

BUG=chrome-os-partner:62051
BRANCH=None
TEST=with required driver support in kernel verify audio on poppy
on-board speakers.

Change-Id: I8ca6db01639d7044690e14410c7a0413f977f28d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7ed1effebc
Original-Change-Id: Id731de42d77204d59f32ac4c33a245837d6e2107
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Signed-off-by: Dylan Reid <dgreid@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18215
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/445641
This commit is contained in:
Rizwan Qureshi 2017-01-13 22:22:42 +05:30 • committed by chrome-bot
parent f7c0e52453
commit a3b70d7a28
2 changed files with 17 additions and 1 deletions
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1
src/mainboard/google/poppy/Kconfig
View file

@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_USES_FSP2_0
select DRIVERS_I2C_MAX98927
select NO_FADT_8042
select SOC_INTEL_KABYLAKE

17
src/mainboard/google/poppy/devicetree.cb
View file

@ -224,7 +224,22 @@ chip soc/intel/skylake
device pci 16.4 off end # Management Engine Interface 3
device pci 17.0 off end # SATA
device pci 19.0 on end # UART #2
device pci 19.1 on end # I2C #5
device pci 19.1 on
chip drivers/i2c/max98927
register "interleave_mode" = "1"
register "uid" = "0"
register "desc" = ""SSM4567 Right Speaker Amp""
register "name" = ""MAXR""
device i2c 39 on end
end
chip drivers/i2c/max98927
register "interleave_mode" = "1"
register "uid" = "1"
register "desc" = ""SSM4567 Left Speaker Amp""
register "name" = ""MAXL""
device i2c 3A on end
end
end # I2C #5
device pci 19.2 on end # I2C #4
device pci 1c.0 on
chip drivers/intel/wifi