mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
Added support for the superio. Serial works but no serial interrupts work.
This is to support sercons for 2.2.16
This commit is contained in:
parent
2346f26a98
commit
a2df0ebecd
3 changed files with 11 additions and 24 deletions
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@ -19,7 +19,7 @@ CFLAGS=$(INCLUDES) -O2 $(CPUFLAGS) -Ilinux/include -Wall
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OBJECTS=crt0.o hardwaremain.o linuxbiosmain.o
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OBJECTS=crt0.o hardwaremain.o linuxbiosmain.o
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OBJECTS += mainboard.o mtrr.o subr.o fill_inbuf.o params.o
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OBJECTS += mainboard.o mtrr.o subr.o fill_inbuf.o params.o
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OBJECTS += southbridge.o northbridge.o
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OBJECTS += southbridge.o northbridge.o superio.o
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#OBJECTS += pci.o
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#OBJECTS += pci.o
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OBJECTS += printk.o vsprintf.o
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OBJECTS += printk.o vsprintf.o
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OBJECTS += newpci.o linuxpci.o
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OBJECTS += newpci.o linuxpci.o
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@ -95,6 +95,9 @@ southbridge.o: $(TOP)/src/northsouthbridge/sis/630/southbridge.c
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northbridge.o: $(TOP)/src/northsouthbridge/sis/630/northbridge.c
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northbridge.o: $(TOP)/src/northsouthbridge/sis/630/northbridge.c
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cc $(CFLAGS) -c $<
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cc $(CFLAGS) -c $<
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superio.o: $(TOP)/src/superio/sis/950/superio.c
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cc $(CFLAGS) -c $<
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pci.o: $(TOP)/src/lib/pci.c
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pci.o: $(TOP)/src/lib/pci.c
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cc $(CFLAGS) -c $<
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cc $(CFLAGS) -c $<
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@ -9,6 +9,12 @@ void
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final_mainboard_fixup(void)
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final_mainboard_fixup(void)
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{
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{
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void final_southbridge_fixup(void);
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void final_southbridge_fixup(void);
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void final_superio_fixup(void);
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final_southbridge_fixup();
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final_southbridge_fixup();
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printk(KERN_INFO "Final mainboard fixup done for Winfast 6300 (and similar)\n");
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final_superio_fixup();
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printk(KERN_INFO
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"Final mainboard fixup done for Winfast 6300 (and similar)\n");
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}
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}
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@ -57,28 +57,6 @@ void nvram_on()
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pci_write_config_word(pcidev, 0x72, 0x1fff);
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pci_write_config_word(pcidev, 0x72, 0x1fff);
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}
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}
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}
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}
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/* turn on the floppy. On some chipsets you have to do this. */
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#ifdef MUST_ENABLE_FLOPPY
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void enable_floppy()
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{
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/* unlock it XXX make this a subr at some point */
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outb(0x87, 0x2e);
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outb(0x01, 0x2e);
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outb(0x55, 0x2e);
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outb(0x55, 0x2e);
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/* now set the LDN to floppy LDN */
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outb(0x7, 0x2e); /* pick reg. 7 */
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outb(0x0, 0x2f); /* LDN 0 to reg. 7 */
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/* now select register 0x30, and set bit 1 in that register */
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outb(0x30, 0x2e);
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outb(0x1, 0x2f);
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/* all done. */
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outb(1, 0x2e);
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}
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#endif /* MUST_ENABLE_FLOPPY */
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// simple fixup (which we hope can leave soon) for the sis southbridge part
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// simple fixup (which we hope can leave soon) for the sis southbridge part
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void
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void
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