diff --git a/Makefile b/Makefile index 7bca25af09..664e1aa63a 100644 --- a/Makefile +++ b/Makefile @@ -85,6 +85,7 @@ export MAINBOARDDIR COREBOOTINCLUDE := -I$(src) -Iinclude \ -I$(src)/include \ -I$(src)/include/arch/$(ARCH)/ \ + -I$(src)/mainboard/$(MAINBOARDDIR)/ \ -include $(obj)/config.h \ -include $(obj)/build.h diff --git a/mainboard/amd/norwich/Makefile b/mainboard/amd/norwich/Makefile index 1befc91cd2..a09529617d 100644 --- a/mainboard/amd/norwich/Makefile +++ b/mainboard/amd/norwich/Makefile @@ -26,7 +26,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/southbridge/amd/cs5536/smbus_initram.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = irq_tables.o +STAGE2_MAINBOARD_OBJ = $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" diff --git a/mainboard/amd/norwich/irq_tables.c b/mainboard/amd/norwich/irq_tables.h similarity index 74% rename from mainboard/amd/norwich/irq_tables.c rename to mainboard/amd/norwich/irq_tables.h index a052ce6575..1db5f9cde5 100644 --- a/mainboard/amd/norwich/irq_tables.c +++ b/mainboard/amd/norwich/irq_tables.h @@ -93,49 +93,3 @@ const struct irq_routing_table intel_irq_routing_table = { {0x00, (0x0C << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x4, 0x0}, /* slot4 */ } }; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - int i, j, k, num_entries; - unsigned char pirq[4]; - u16 chipset_irq_map; - u32 pciAddr, pirtable_end; - struct irq_routing_table *pirq_tbl; - - pirtable_end = copy_pirq_routing_table(addr); - - /* Set up chipset IRQ steering. */ - pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; - chipset_irq_map = (PIRQD << 12 | PIRQC << 8 | PIRQB << 4 | PIRQA); - printk(BIOS_DEBUG, "%s(%08X, %04X)\n", __FUNCTION__, pciAddr, - chipset_irq_map); - outl(pciAddr & ~3, 0xCF8); - outl(chipset_irq_map, 0xCFC); - - pirq_tbl = (struct irq_routing_table *) (addr); - num_entries = (pirq_tbl->size - 32) / 16; - - /* Set PCI IRQs. */ - for (i = 0; i < num_entries; i++) { - printk(BIOS_DEBUG, "PIR Entry %d Dev/Fn: %X Slot: %d\n", i, - pirq_tbl->slots[i].devfn, pirq_tbl->slots[i].slot); - for (j = 0; j < 4; j++) { - printk(BIOS_DEBUG, "INT: %c bitmap: %x ", 'A' + j, - pirq_tbl->slots[i].irq[j].bitmap); - /* Finds lsb in bitmap to IRQ#. */ - for (k = 0; - (!((pirq_tbl->slots[i].irq[j].bitmap >> k) & 1)) - && (pirq_tbl->slots[i].irq[j].bitmap != 0); - k++); - pirq[j] = k; - printk(BIOS_DEBUG, "PIRQ: %d\n", k); - } - - /* Bus, device, slots IRQs for {A,B,C,D}. */ - pci_assign_irqs(pirq_tbl->slots[i].bus, - pirq_tbl->slots[i].devfn >> 3, pirq); - } - - /* Put the PIR table in memory and checksum. */ - return pirtable_end; -} diff --git a/mainboard/artecgroup/dbe61/irq_tables.c b/mainboard/artecgroup/dbe61/irq_tables.h similarity index 100% rename from mainboard/artecgroup/dbe61/irq_tables.c rename to mainboard/artecgroup/dbe61/irq_tables.h diff --git a/mainboard/artecgroup/dbe62/Makefile b/mainboard/artecgroup/dbe62/Makefile index da0faab6b4..da4c25a6c6 100644 --- a/mainboard/artecgroup/dbe62/Makefile +++ b/mainboard/artecgroup/dbe62/Makefile @@ -25,7 +25,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = irq_tables.o +STAGE2_MAINBOARD_OBJ = $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" diff --git a/mainboard/artecgroup/dbe62/irq_tables.c b/mainboard/artecgroup/dbe62/irq_tables.h similarity index 64% rename from mainboard/artecgroup/dbe62/irq_tables.c rename to mainboard/artecgroup/dbe62/irq_tables.h index 5648ba0247..539f329876 100644 --- a/mainboard/artecgroup/dbe62/irq_tables.c +++ b/mainboard/artecgroup/dbe62/irq_tables.h @@ -68,49 +68,3 @@ const struct irq_routing_table intel_irq_routing_table = { {0x00, (0x0D << 3) | 0x0, {{L_PIRQC, M_PIRQC}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, /* ethernet */ } }; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - int i, j, k, num_entries; - unsigned char pirq[4]; - u16 chipset_irq_map; - u32 pciAddr, pirtable_end; - struct irq_routing_table *pirq_tbl; - - pirtable_end = copy_pirq_routing_table(addr); - - /* Set up chipset IRQ steering. */ - pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; - chipset_irq_map = (PIRQD << 12 | PIRQC << 8 | PIRQB << 4 | PIRQA); - printk(BIOS_DEBUG, "%s(%08X, %04X)\n", __FUNCTION__, pciAddr, - chipset_irq_map); - outl(pciAddr & ~3, 0xCF8); - outl(chipset_irq_map, 0xCFC); - - pirq_tbl = (struct irq_routing_table *) (addr); - num_entries = (pirq_tbl->size - 32) / 16; - - /* Set PCI IRQs. */ - for (i = 0; i < num_entries; i++) { - printk(BIOS_DEBUG, "PIR Entry %d Dev/Fn: %X Slot: %d\n", i, - pirq_tbl->slots[i].devfn, pirq_tbl->slots[i].slot); - for (j = 0; j < 4; j++) { - printk(BIOS_DEBUG, "INT: %c bitmap: %x ", 'A' + j, - pirq_tbl->slots[i].irq[j].bitmap); - /* Finds lsb in bitmap to IRQ#. */ - for (k = 0; - (!((pirq_tbl->slots[i].irq[j].bitmap >> k) & 1)) - && (pirq_tbl->slots[i].irq[j].bitmap != 0); - k++); - pirq[j] = k; - printk(BIOS_DEBUG, "PIRQ: %d\n", k); - } - - /* Bus, device, slots IRQs for {A,B,C,D}. */ - pci_assign_irqs(pirq_tbl->slots[i].bus, - pirq_tbl->slots[i].devfn >> 3, pirq); - } - - /* Put the PIR table in memory and checksum. */ - return pirtable_end; -} diff --git a/mainboard/pcengines/alix1c/Makefile b/mainboard/pcengines/alix1c/Makefile index da0faab6b4..da4c25a6c6 100644 --- a/mainboard/pcengines/alix1c/Makefile +++ b/mainboard/pcengines/alix1c/Makefile @@ -25,7 +25,7 @@ INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = irq_tables.o +STAGE2_MAINBOARD_OBJ = $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" diff --git a/mainboard/pcengines/alix1c/irq_tables.c b/mainboard/pcengines/alix1c/irq_tables.h similarity index 72% rename from mainboard/pcengines/alix1c/irq_tables.c rename to mainboard/pcengines/alix1c/irq_tables.h index 169d553e67..299bc6b599 100644 --- a/mainboard/pcengines/alix1c/irq_tables.c +++ b/mainboard/pcengines/alix1c/irq_tables.h @@ -17,18 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include "../../../southbridge/amd/cs5536/cs5536.h" - /* Platform IRQs */ @@ -112,49 +101,3 @@ const struct irq_routing_table intel_irq_routing_table = { {0x00, (0x0F << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x0, 0x0}, } }; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - int i, j, k, num_entries; - unsigned char pirq[4]; - u16 chipset_irq_map; - u32 pciAddr, pirtable_end; - struct irq_routing_table *pirq_tbl; - - pirtable_end = copy_pirq_routing_table(addr); - - /* Set up chipset IRQ steering. */ - pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; - chipset_irq_map = (PIRQD << 12 | PIRQC << 8 | PIRQB << 4 | PIRQA); - printk(BIOS_DEBUG, "%s(%08X, %04X)\n", __FUNCTION__, pciAddr, - chipset_irq_map); - outl(pciAddr & ~3, 0xCF8); - outl(chipset_irq_map, 0xCFC); - - pirq_tbl = (struct irq_routing_table *) (addr); - num_entries = (pirq_tbl->size - 32) / 16; - - /* Set PCI IRQs. */ - for (i = 0; i < num_entries; i++) { - printk(BIOS_DEBUG, "PIR Entry %d Dev/Fn: %X Slot: %d\n", i, - pirq_tbl->slots[i].devfn, pirq_tbl->slots[i].slot); - for (j = 0; j < 4; j++) { - printk(BIOS_DEBUG, "INT: %c bitmap: %x ", 'A' + j, - pirq_tbl->slots[i].irq[j].bitmap); - /* Finds lsb in bitmap to IRQ#. */ - for (k = 0; - (!((pirq_tbl->slots[i].irq[j].bitmap >> k) & 1)) - && (pirq_tbl->slots[i].irq[j].bitmap != 0); - k++); - pirq[j] = k; - printk(BIOS_DEBUG, "PIRQ: %d\n", k); - } - - /* Bus, device, slots IRQs for {A,B,C,D}. */ - pci_assign_irqs(pirq_tbl->slots[i].bus, - pirq_tbl->slots[i].devfn >> 3, pirq); - } - - /* Put the PIR table in memory and checksum. */ - return pirtable_end; -} diff --git a/southbridge/amd/cs5536/Makefile b/southbridge/amd/cs5536/Makefile index 54d3dd5326..cb758dc5c9 100644 --- a/southbridge/amd/cs5536/Makefile +++ b/southbridge/amd/cs5536/Makefile @@ -23,6 +23,10 @@ ifeq ($(CONFIG_SOUTHBRIDGE_AMD_CS5536),y) STAGE2_CHIPSET_OBJ += $(obj)/southbridge/amd/cs5536/cs5536.o +ifeq ($(CONFIG_PIRQ_TABLE),y) +STAGE2_CHIPSET_OBJ += $(obj)/southbridge/amd/cs5536/irq_tables.o +endif + STAGE0_CHIPSET_OBJ += $(obj)/southbridge/amd/cs5536/stage1.o endif