Emulation/switch-coreboot
1
0
Fork 0
mirror of https://github.com/fail0verflow/switch-coreboot.git synced 2025-05-04 01:39:18 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

UPSTREAM: google/veyron*: mark GPIO array non-static

Browse source 
That status isn't needed and making it non-static helps gcc 4.9.2 (or
any compiler that insists on "standard C" behaviour with global const
initializers)

BUG=none
BRANCH=none
TEST=none

Change-Id: I90c0d1ce22365b2276cf173f1e95d22ea50963a2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c09e148b38
Original-Change-Id: Ib1fbd5213d262e653f31564b106095b4a28292f6
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://review.coreboot.org/18266
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/435259
This commit is contained in:
Patrick Georgi 2017-01-30 17:53:34 +01:00 • committed by chrome-bot
parent 4857f7b346
commit 9b98443125
3 changed files with 6 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/mainboard/google/veyron/boardid.c
View file

@ -21,7 +21,7 @@
uint8_t board_id(void)
{
static int id = -1;
static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
@ -35,7 +35,7 @@ uint8_t board_id(void)
uint32_t ram_code(void)
{
uint32_t code;
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_base2_value(pins, ARRAY_SIZE(pins));

4
src/mainboard/google/veyron_mickey/boardid.c
View file

@ -21,7 +21,7 @@
uint8_t board_id(void)
{
static int id = -1;
static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
@ -35,7 +35,7 @@ uint8_t board_id(void)
uint32_t ram_code(void)
{
uint32_t code;
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_base2_value(pins, ARRAY_SIZE(pins));

4
src/mainboard/google/veyron_rialto/boardid.c
View file

@ -21,7 +21,7 @@
uint8_t board_id(void)
{
static int id = -1;
static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
@ -35,7 +35,7 @@ uint8_t board_id(void)
uint32_t ram_code(void)
{
uint32_t code;
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_base2_value(pins, ARRAY_SIZE(pins));