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UPSTREAM: nb/i945: Clean "Programming DLL Timings" function

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As we drive both channels with the same speed,
chan0dll and chan1dll are the same.

BUG=none
BRANCH=none
TEST=none

Change-Id: I64c2fe3d14c3f174448863ac37ac8ba21f09a369
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 44a3066015
Original-Change-Id: I7253ea9ea66396c536c82d63c67fecb041681707
Original-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Original-Reviewed-on: https://review.coreboot.org/18472
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/450238
This commit is contained in:
Elyes HAOUAS 2017-02-23 13:14:44 +01:00 • committed by chrome-bot
parent 067e4274df
commit 97f5780308
1 changed files with 13 additions and 13 deletions
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26
src/northbridge/intel/i945/raminit.c
View file

@ -1227,7 +1227,7 @@ static void sdram_enable_rcomp(void)
static void sdram_program_dll_timings(struct sys_info *sysinfo)
{
u32 chan0dll = 0, chan1dll = 0;
u32 channeldll = 0;
int i;
printk(BIOS_DEBUG, "Programming DLL Timings...\n");
@ -1238,26 +1238,26 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
/* We drive both channels with the same speed */
if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
switch (sysinfo->memory_frequency) {
case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
case 400: channeldll = 0x26262626; break;
case 533: channeldll = 0x22222222; break;
case 667: channeldll = 0x11111111; break;
}
} else if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
switch (sysinfo->memory_frequency) {
case 400: chan0dll = 0x33333333; chan1dll = 0x33333333; break; /* 400MHz */
case 533: chan0dll = 0x24242424; chan1dll = 0x24242424; break; /* 533MHz */
case 667: chan0dll = 0x25252525; chan1dll = 0x25252525; break; /* 667MHz */
case 400: channeldll = 0x33333333; break;
case 533: channeldll = 0x24242424; break;
case 667: channeldll = 0x25252525; break;
}
}
for (i = 0; i < 4; i++) {
MCHBAR32(C0R0B00DQST + (i * 0x10) + 0) = chan0dll;
MCHBAR32(C0R0B00DQST + (i * 0x10) + 4) = chan0dll;
MCHBAR32(C1R0B00DQST + (i * 0x10) + 0) = chan1dll;
MCHBAR32(C1R0B00DQST + (i * 0x10) + 4) = chan1dll;
MCHBAR32(C0R0B00DQST + (i * 0x10) + 0) = channeldll;
MCHBAR32(C0R0B00DQST + (i * 0x10) + 4) = channeldll;
MCHBAR32(C1R0B00DQST + (i * 0x10) + 0) = channeldll;
MCHBAR32(C1R0B00DQST + (i * 0x10) + 4) = channeldll;
if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
MCHBAR8(C0R0B00DQST + (i * 0x10) + 8) = chan0dll & 0xff;
MCHBAR8(C1R0B00DQST + (i * 0x10) + 8) = chan1dll & 0xff;
MCHBAR8(C0R0B00DQST + (i * 0x10) + 8) = channeldll & 0xff;
MCHBAR8(C1R0B00DQST + (i * 0x10) + 8) = channeldll & 0xff;
}
}
}