initial check for vt1211

src/superio/via/vt1211/setup_serial.inc

@@ -0,0 +1,59 @@
+#define OUTIT(val, port) movb val, %al; \
+	outb %al, port
+
+#define OUTPNPADDR(val) OUTIT(val, $0x2e); OUTIT(val, $0xeb)
+#define OUTPNPDATA(val) OUTIT(val, $0x2f); OUTIT(val, $0xeb)
+
+/* to do: move this to a common include file! */
+#define WRITESIOBYTE(register, value) movw register, %dx ;\
+	movb	value, %al ;\
+	outb	%al, %dx;\
+	outb	%al, $0xeb;\
+	outb	%al, $0xeb
+
+#define WRITESIOWORD(register, value) movw register, %dx ;\
+	movw	value, %ax ;\
+	outw	%ax, %dx;\
+	outb	%al, $0xeb;\
+	outb	%al, $0xeb
+
+enable_serial:
+	/* turn on PnP */
+	OUTPNPADDR($0x87)
+	OUTPNPADDR($0x87)
+
+	/* select com1 */
+	OUTPNPADDR($7)
+	OUTPNPDATA($2)
+	/* set the enable in reg. 0x30 */
+	OUTPNPADDR($0x30)
+	OUTPNPDATA($0x1)
+
+	/* Serial Port 1 Base Address (FEh) */
+	OUTPNPADDR($0x60)
+	OUTPNPDATA($0xfe)
+	/* Serial Port 1 IRQ (04h) */
+	OUTPNPADDR($0x70)
+	OUTPNPDATA($0x4)
+	/* Serial Port 1 Control */
+	OUTPNPADDR($0xf0)
+	OUTPNPDATA($0x2)
+
+	/* turn off PnP */
+	OUTPNPADDR($0xaa)
+
+	/* all done that nonsense -- from here on it's standard pc80 */
+	/* Enable DLAB to set baud rate. */
+	WRITESIOBYTE($0x3fb, $0x80)
+	/* Set Buad Rate Divisor = 1==> 115 kb */
+	WRITESIOWORD($0x3f8, $0x1)
+	/* now set no parity, one stop, 8 bits, disable DLAB */
+	WRITESIOBYTE($0x3fb, $0x3)
+	/* now turn on RTS, DTR */
+	WRITESIOBYTE($0x3fc, $0x3)
+	/* Enable interrupts */
+	WRITESIOBYTE($0x3f9, $0xf)
+
+	/* should be done. Dump a char for fun. */
+	WRITESIOBYTE($0x3f8, $0x30)
+

src/superio/via/vt1211/superio.c

@@ -0,0 +1,28 @@
+void
+final_superio_fixup()
+{
+        unsigned char enables;
+
+	/* Base 8231 controller */
+	struct pci_dev *dev0 = pci_find_device(PCI_VENDOR_ID_VIA, \
+						0x3177, 0);
+
+	/* enable com ports, since we're using this built-in superio */
+	/* enable com1 and com2. */
+	enables = pci_read_config_byte(dev, 0x6e, &enables);
+	/*
+	 * 0x80 is enable com port b, 0x1 is to make it com2, 0x8 is 
+	 * enable com port a as com1
+	 * kevinh/Ispiri - fixed, had 0x1 for com2
+	 */
+	enables = 0x80 | 0x10 | 0x8 ;
+	pci_write_config_byte(dev, 0x6e, enables);
+	/*
+	 * note: this is also a redo of some port of assembly, but we want 
+	 * everything up.
+	 * set com1 to 115 kbaud
+	 * not clear how to do this yet.
+	 * forget it; done in assembly.
+	 */
+}
+