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stage0 code for K8 and i586 has lots of mostly identical parts even in
CAR code. Reduce the diff of the mostly identical parts to zero. That involves changing comments, whitespace and instruction order. Now we can split out the common parts more easily and concentrate on the differences. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@907 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger
parent
662895f5a2
commit
96fcf12785
3 changed files with 45 additions and 34 deletions
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@ -17,8 +17,14 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Init code - Switch CPU to protected mode and enable Cache-as-Ram (CAR). */
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#define ASSEMBLY
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#include <macros.h>
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#include <mtrr.h>
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#include <amd/k8/k8.h>
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#define CacheSize CONFIG_CARSIZE
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#define CacheBase CONFIG_CARBASE
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#define MEM_TOPK 2048
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@ -32,9 +38,6 @@
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#define CacheSizeAPStack 0x400 /* 1K */
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#endif
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#include <mtrr.h>
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#include <amd/k8/k8.h>
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.code16
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.globl _stage0
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_stage0:
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@ -239,13 +242,13 @@ enable_fixed_mtrr_dram_modify:
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clear_fixed_var_mtrr:
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lodsl (%esi), %eax
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testl %eax, %eax
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jz clear_fixed_var_mtrr_out
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jz clear_fixed_var_mtrr_out
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movl %eax, %ecx
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xorl %eax, %eax
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wrmsr
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jmp clear_fixed_var_mtrr
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jmp clear_fixed_var_mtrr
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clear_fixed_var_mtrr_out:
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/* 0x06 is the WB IO type for a given 4k segment.
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@ -304,14 +307,14 @@ clear_fixed_var_mtrr_out:
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#endif
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#if CacheSize > 0x8000
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/* enable caching for 32K-64K using fixed mtrr */
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movl $0x268, %ecx /* fix4k_c0000*/
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/* enable caching for 32K-64K using fixed mtrr */
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movl $0x268, %ecx /* fix4k_c0000*/
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simplemask CacheSize, 0x8000
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wrmsr
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wrmsr
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#endif
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/* enable caching for 0-32K using fixed mtrr */
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movl $0x269, %ecx /* fix4k_c8000*/
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/* enable caching for 0-32K using fixed mtrr */
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movl $0x269, %ecx /* fix4k_c8000*/
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simplemask CacheSize, 0
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wrmsr
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@ -436,12 +439,15 @@ CAR_FAM10_ap_out:
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/* Restore the BIST result. */
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movl %ebp, %eax
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/* We need to set ebp ? No need */
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/* We need to set ebp? No need. */
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movl %esp, %ebp
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pushl %ebx /* init detected */
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pushl %eax /* bist */
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/* Second parameter: init_detected */
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pushl %ebx
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/* First parameter: bist */
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pushl %eax
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call stage1_main
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/* We will not go back */
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/* We will not go back. */
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movb $0xAF, %al /* Should never see this postcode */
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outb %al, $0x80
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@ -462,7 +468,6 @@ mem_top:
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.long 0xC001001A, 0xC001001D
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.long 0x000 /* NULL, end of table */
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cache_as_ram_setup_out:
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/* Reset vector. */
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/*
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@ -92,7 +92,7 @@ gdt16x:
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.byte 0x00, 0x93, 0xcf, 0x00
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gdt16xend:
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/* From now on we are 32bit. */
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/* From now on we are 32 bit. */
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.code32
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/* We have two gdts where we could have one. That is ok.
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@ -365,15 +365,17 @@ lout:
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movl $0, %eax
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pushl %eax
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/* Store zero for the unused init_detected parameter. */
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pushl %eax
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/* Restore the BIST result. */
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movl %ebp, %eax
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/* We need to set ebp? No need. */
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movl %esp, %ebp
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pushl %eax /* BIST */
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/* Second parameter: init_detected */
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/* Store zero for the unused init_detected parameter. */
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pushl $0
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/* First parameter: bist */
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pushl %eax
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jmp stage1_main
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/* We will not go back. */
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@ -23,7 +23,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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# init code - switch cpu to pmode and enable cache as ram.
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/* Init code - Switch CPU to protected mode and enable Cache-as-Ram (CAR). */
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#include <macros.h>
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@ -277,7 +277,7 @@ NotHtProcessor:
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movl $0x00000c00, %eax
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wrmsr
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/*Clear all MTRRs */
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/* Clear all MTRRs */
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xorl %edx, %edx
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movl $fixed_mtrr_msr, %esi
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clear_fixed_var_mtrr:
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@ -289,7 +289,7 @@ clear_fixed_var_mtrr:
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xorl %eax, %eax
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wrmsr
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jmp clear_fixed_var_mtrr
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jmp clear_fixed_var_mtrr
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clear_fixed_var_mtrr_out:
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/* 0x06 is the WB IO type for a given 4k segment.
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@ -305,13 +305,13 @@ clear_fixed_var_mtrr_out:
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*/
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xorl \reg, \reg
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.elseif \segs == 1
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movl $0x06000000, \reg
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movl $0x06000000, \reg /* WB IO type */
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.elseif \segs == 2
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movl $0x06060000, \reg
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movl $0x06060000, \reg /* WB IO type */
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.elseif \segs == 3
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movl $0x06060600, \reg
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movl $0x06060600, \reg /* WB IO type */
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.elseif \segs >= 4
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movl $0x06060606, \reg
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movl $0x06060606, \reg /* WB IO type */
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.endif
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.endm
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@ -439,16 +439,20 @@ lout:
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movl $0, %eax
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pushl %eax
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/* Store zero for the unused init_detected parameter. */
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pushl %eax
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/* Restore the BIST result. */
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movl %ebp, %eax
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/* We need to set ebp ? No need */
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/* We need to set ebp? No need. */
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movl %esp, %ebp
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pushl %eax /* bist */
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call stage1_main
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/* We will not go back */
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/* Second parameter: init_detected */
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/* Store zero for the unused init_detected parameter. */
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pushl $0
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/* First parameter: bist */
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pushl %eax
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call stage1_main
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/* We will not go back. */
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fixed_mtrr_msr:
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.long 0x250, 0x258, 0x259
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.long 0x268, 0x269, 0x26A
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