Emulation/switch-coreboot
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Minor typos that need to be fixed. The oddest thing is that an earlier

Browse source 
version, with these typos, compiled. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@889 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-10-05 04:56:29 +00:00
parent 2e5e287aab
commit 96d8efcb79
4 changed files with 36 additions and 33 deletions
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6
superio/fintek/f71805f/superio.c
View file

@ -95,6 +95,8 @@ static void f71805f_init(struct device *dev)
}
}
static void phase2_setup_scan_bus(struct device *dev);
struct device_operations f71805f_ops = {
.phase2_setup_scan_bus = phase2_setup_scan_bus,
.phase4_read_resources = pnp_read_resources,
@ -105,8 +107,8 @@ struct device_operations f71805f_ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &f71805f_ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &f71805f_ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
/* TODO: Everything else */
};

16
superio/ite/it8712f/superio.c
View file

@ -114,7 +114,7 @@ static void it8712f_pnp_enable(struct device * dev)
pnp_set_enable(dev, dev->enabled);
pnp_exit_ext_func_mode(dev);
}
static void it8712f_setup_scan_bus(struct device *dev);
struct device_operations it8712f_ops = {
.phase2_setup_scan_bus = it8712f_setup_scan_bus,
.phase4_read_resources = pnp_read_resources,
@ -126,13 +126,13 @@ struct device_operations it8712f_ops = {
/* TODO: FDC, MIDI, GAME, IR. */
static struct pnp_info pnp_dev_info[] = {
{&ops, IT8712F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0}, },
{&ops, IT8712F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x7f8, 0}, },
{&ops, IT8712F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
{&ops, IT8712F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4},},
{&ops, IT8712F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4}, },
{&ops, IT8712F_KBCM, PNP_IRQ0, },
{&ops, IT8712F_GPIO, },
{&it8712f_ops, IT8712F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0}, },
{&it8712f_ops, IT8712F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x7f8, 0}, },
{&it8712f_ops, IT8712F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
{&it8712f_ops, IT8712F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4},},
{&it8712f_ops, IT8712F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4}, },
{&it8712f_ops, IT8712F_KBCM, PNP_IRQ0, },
{&it8712f_ops, IT8712F_GPIO, },
};
static void it8712f_setup_scan_bus(struct device *dev)

23
superio/ite/it8716f/superio.c
View file

@ -143,6 +143,7 @@ static void it8716f_init(struct device *dev)
}
}
static void it8716f_setup_scan_bus(struct device *dev);
struct device_operations it8716f_ops = {
.phase2_setup_scan_bus = it8716f_setup_scan_bus,
.phase4_read_resources = pnp_read_resources,
@ -153,19 +154,19 @@ struct device_operations it8716f_ops = {
};
static struct pnp_info pnp_dev_info[] = {
{&ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
{&ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
{&ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
{&ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
{&ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0},
{&it8716f_ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
{&it8716f_ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
{&it8716f_ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
{&it8716f_ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
{&it8716f_ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0},
{0x7f8, 0x4},},
{&ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0},
{&it8716f_ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0},
{0x7ff, 0x4},},
{&ops, IT8716F_KBCM, PNP_IRQ0,},
{&ops, IT8716F_GPIO, PNP_IO1 | PNP_IO2, {0, 0}, {0x7f8, 0}, {0x7f8, 0},},
{&ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},},
{&ops, IT8716F_GAME, PNP_IO0, {0x7ff, 0},},
{&ops, IT8716F_IR,},
{&it8716f_ops, IT8716F_KBCM, PNP_IRQ0,},
{&it8716f_ops, IT8716F_GPIO, PNP_IO1 | PNP_IO2, {0, 0}, {0x7f8, 0}, {0x7f8, 0},},
{&it8716f_ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},},
{&it8716f_ops, IT8716F_GAME, PNP_IO0, {0x7ff, 0},},
{&it8716f_ops, IT8716F_IR,},
};
static void it8716f_setup_scan_bus(struct device *dev)

24
superio/winbond/w83627hf/superio.c
View file

@ -189,7 +189,7 @@ void w83627hf_pnp_enable(struct device * dev)
pnp_exit_ext_func_mode(dev);
}
}
static void phase2_setup_scan_bus(struct device *dev);
struct device_operations w83627hf_ops = {
.phase2_setup_scan_bus = phase2_setup_scan_bus,
.phase4_read_resources = pnp_read_resources,
@ -200,18 +200,18 @@ struct device_operations w83627hf_ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &w83627hf_ops, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &w83627hf_ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &w83627hf_ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &w83627hf_ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
// No 4 { 0,},
{ &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
{ &ops, W83627HF_GPIO2, },
{ &ops, W83627HF_GPIO3, },
{ &ops, W83627HF_ACPI, },
{ &ops, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
{ &w83627hf_ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &w83627hf_ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &w83627hf_ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
{ &w83627hf_ops, W83627HF_GPIO2, },
{ &w83627hf_ops, W83627HF_GPIO3, },
{ &w83627hf_ops, W83627HF_ACPI, },
{ &w83627hf_ops, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
};