Emulation/switch-coreboot
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back out until this issue is really fixed.

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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@1059 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Stefan Reinauer 2008-11-26 09:17:29 +00:00
parent 645bd273e1
commit 8e7ca90b6f
1 changed files with 1 additions and 14 deletions
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15
arch/x86/intel/core2/stage0.S
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@ -3,7 +3,6 @@
*
* Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
* Copyright (C) 2007-2008 coresystems GmbH
* Copyright (C) 2008 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -160,20 +159,9 @@ clear_mtrrs:
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
movl %eax, %esp
/* Store zero for the pointer to the global variables. */
pushl $0
/* Restore the BIST result. */
/* Restore the BIST result */
movl %ebp, %eax
/* We need to set ebp? No need. */
movl %esp, %ebp
/* Second parameter: init_detected */
/* Store zero for the unused init_detected parameter. */
pushl $0
/* First parameter: bist */
pushl %eax
#if 0
@ -182,7 +170,6 @@ clear_mtrrs:
#endif
call stage1_phase1
/* We will not go back. */
port80_post(0x2f)
error: