mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
clean up ramstage
This commit is contained in:
parent
3ffecc7899
commit
8c7417dca8
3 changed files with 0 additions and 48 deletions
|
@ -36,7 +36,6 @@ romstage-y += romstage.c
|
|||
romstage-y += sdram_configs.c
|
||||
romstage-y += cbfs_switch.c
|
||||
|
||||
ramstage-y += boardid.c
|
||||
ramstage-y += mainboard.c
|
||||
ramstage-y += reset.c
|
||||
ramstage-y += pmic.c
|
||||
|
|
|
@ -1,39 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2015 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <boardid.h>
|
||||
#include <console/console.h>
|
||||
#include <soc/sdram.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
uint32_t board_id(void)
|
||||
{
|
||||
static int id = -1;
|
||||
|
||||
if (id < 0) {
|
||||
gpio_t gpio[] = {[1] = BD_ID1, [0] = BD_ID0}; /* ID0 is LSB */
|
||||
|
||||
id = gpio_base3_value(gpio, ARRAY_SIZE(gpio));
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
uint32_t ram_code(void)
|
||||
{
|
||||
return sdram_get_ram_code();
|
||||
}
|
|
@ -218,11 +218,3 @@ struct chip_operations mainboard_ops = {
|
|||
.name = "switch",
|
||||
.enable_dev = mainboard_enable,
|
||||
};
|
||||
|
||||
void lb_board(struct lb_header *header)
|
||||
{
|
||||
#if IS_ENABLED(CONFIG_CHROMEOS)
|
||||
lb_table_add_serialno_from_vpd(header);
|
||||
#endif
|
||||
soc_add_mtc(header);
|
||||
}
|
||||
|
|
Loading…
Add table
Reference in a new issue