UPSTREAM: siemens/mc_apl1: Enable decoding for COM 3 on LPC

Since this mainboard provides 3 COM ports on LPC, enable decoding of the
corresponding address range for COM 3.

BUG=none
BRANCH=none
TEST=none

Change-Id: Iae09fc6a1ef0457322c9d5c84fefcd06832bf248
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: a00d84536b
Original-Change-Id: I15c0748fce67eef46401c314f441aa45f5e3c5fa
Original-Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Original-Reviewed-on: https://review.coreboot.org/20162
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://chromium-review.googlesource.com/539196
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Mario Scheithauer 2017-06-12 14:52:40 +02:00 committed by chrome-bot
parent 27b68e083d
commit 8bcfbc0af1

View file

@ -17,6 +17,7 @@
#include <device/pci.h>
#include <device/device.h>
#include <console/console.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
#include <string.h>
#include <hwilib.h>
@ -109,6 +110,9 @@ static void mainboard_init(void *chip_info)
pads = brd_gpio_table(&num);
gpio_configure_pads(pads, num);
/* Enable additional I/O decoding range on LPC for COM 3 */
lpc_open_pmio_window(0x3e8, 8);
}
static void mainboard_final(void *chip_info)