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Grow rom space. This now gets a triple fault but I am hoping some smart

Browse source 
person can fix it.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@820 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-08-24 19:55:45 +00:00
parent 2b9919965b
commit 8a9d1f2b24
3 changed files with 8 additions and 3 deletions
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1
mainboard/amd/serengeti/Makefile
View file

@ -25,6 +25,7 @@ STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
$(src)/mainboard/$(MAINBOARDDIR)/option_table.c \
$(src)/southbridge/amd/amd8111/stage1_smbus.c \
$(src)/southbridge/amd/amd8111/stage1_ctrl.c \
$(src)/southbridge/amd/amd8111/stage1_enable_rom.c \
$(src)/northbridge/amd/k8/coherent_ht.c \
$(src)/northbridge/amd/k8/incoherent_ht.c \
$(src)/northbridge/amd/k8/libstage1.c \

4
mainboard/amd/serengeti/stage1.c
View file

@ -32,9 +32,13 @@
#include <io.h>
#include <arch/x86/msr.h>
void amd8111_enable_rom(void);
void hardware_stage1(void)
{
printk(BIOS_ERR, "Stage1: enable rom ...\n");
amd8111_enable_rom();
printk(BIOS_ERR, "Done.\n");
post_code(POST_START_OF_MAIN);
}

6
southbridge/amd/amd8111/stage1_enable_rom.c
View file

@ -32,15 +32,15 @@
/**
* Enable the 5 MB address space for the ROM
*/
static void amd8111_enable_rom(void)
void amd8111_enable_rom(void)
{
u8 byte;
u32 dev;
/* Enable 5MB rom access at 0xFFB00000 - 0xFFFFFFFF */
/* Locate the amd8111 */
pci_locate_device_on_bus(0, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA, &dev);
pci_conf1_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA,
&dev);
/* Set the 5MB enable bits */
byte = pci_conf1_read_config8(dev, 0x43);
byte |= 0xC0;