diff --git a/arch/x86/geodelx/stage1.c b/arch/x86/geodelx/stage1.c
index f5c26bc6a5..d3130b47e7 100644
--- a/arch/x86/geodelx/stage1.c
+++ b/arch/x86/geodelx/stage1.c
@@ -22,6 +22,7 @@
 #include <lib.h>
 #include <msr.h>
 #include <amd_geodelx.h>
+#include <console.h>
 
 static const struct msrinit msr_table[] = {
   /* Setup access to cache under 1MB. */
@@ -59,5 +60,12 @@ void disable_car(void)
 	for (i = 0; i < ARRAY_SIZE(msr_table); i++)
 		wrmsr(msr_table[i].msrnum, msr_table[i].msr);
 
-	__asm__("wbinvd\n");
+	/* OK, here is the theory: we should be able to copy 
+	 * the data back over itself, and the wbinvd should then 
+	 * flush to memory. Let's see. 
+	 */
+	__asm__ __volatile__("cld; rep movsl" ::"D" (DCACHE_RAM_BASE), "S" (DCACHE_RAM_BASE), "c" (DCACHE_RAM_SIZE/4): "memory");
+	__asm__ __volatile__ ("wbinvd\n");
+	banner(BIOS_DEBUG, "Disable_car: done wbinvd");
+	banner(BIOS_DEBUG, "disable_car: done");
 }
diff --git a/include/arch/x86/amd_geodelx.h b/include/arch/x86/amd_geodelx.h
index 7941659404..e3bacd6fb4 100644
--- a/include/arch/x86/amd_geodelx.h
+++ b/include/arch/x86/amd_geodelx.h
@@ -566,7 +566,12 @@
 
 /* ------------------------  */
 #define DCACHE_RAM_SIZE 0x08000
-#define DCACHE_RAM_BASE 0xc8000
+#define DCACHE_RAM_BASE 0x80000
+/* This is where the DCache will be mapped and be used as stack. It would be
+ * cool if it was the same base as LinuxBIOS normal stack.
+ */
+#define LX_STACK_BASE		DCACHE_RAM_BASE
+#define LX_STACK_END		LX_STACK_BASE + (DCACHE_RAM_SIZE - 4)
 /* This is where the DCache will be mapped and be used as stack. It would be
  * cool if it was the same base as LinuxBIOS normal stack.
  */