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UPSTREAM: amd/pi/hudson: Move audio to northbridge

Browse source 
Carrizo (00660F01), Merlin Falcon (00660F01), and Stoney Ridge (00670F00)
locate the HD audio controller on the northbridge root complex at 9.2
instead of the FCH.  This duplicates the existing ASL into the northbridge
directories and reports the correct address.

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit f68206c2b42c90076efd968a99f4d3a49e403438)

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17216
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: I6d42bb40ad58c7f35e8c88ff27ebd327d656c021
Reviewed-on: https://chromium-review.googlesource.com/408969
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marshall Dawson 2016-10-31 14:17:46 -04:00 • committed by chrome-bot
parent e2b4b0549b
commit 88085014d3
3 changed files with 76 additions and 0 deletions
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37
src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
View file

@ -129,3 +129,40 @@ Device(PBRC) {
Return (PSC) /* PIC Mode */
} /* end _PRT */
} /* end PBR8 */
Device(AZHD) { /* 0:9.2 - HD Audio */
Name(_ADR, 0x00090002)
OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
Field(AZPD, AnyAcc, NoLock, Preserve) {
offset (0x42),
NSDI, 1,
NSDO, 1,
NSEN, 1,
offset (0x44),
IPCR, 4,
offset (0x54),
PWST, 2,
, 6,
PMEB, 1,
, 6,
PMST, 1,
offset (0x62),
MMCR, 1,
offset (0x64),
MMLA, 32,
offset (0x68),
MMHA, 32,
offset (0x6C),
MMDT, 16,
}
Method (_INI, 0, NotSerialized)
{
If (LEqual (OSVR, 0x03))
{
Store (Zero, NSEN)
Store (One, NSDO)
Store (One, NSDI)
}
}
} /* end AZHD */

37
src/northbridge/amd/pi/00670F00/acpi/northbridge.asl
View file

@ -95,3 +95,40 @@ Device(PBR8) {
Return (PS8) /* PIC Mode */
} /* end _PRT */
} /* end PBR8 */
Device(AZHD) { /* 0:9.2 - HD Audio */
Name(_ADR, 0x00090002)
OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
Field(AZPD, AnyAcc, NoLock, Preserve) {
offset (0x42),
NSDI, 1,
NSDO, 1,
NSEN, 1,
offset (0x44),
IPCR, 4,
offset (0x54),
PWST, 2,
, 6,
PMEB, 1,
, 6,
PMST, 1,
offset (0x62),
MMCR, 1,
offset (0x64),
MMLA, 32,
offset (0x68),
MMHA, 32,
offset (0x6C),
MMDT, 16,
}
Method (_INI, 0, NotSerialized)
{
If (LEqual (OSVR, 0x03))
{
Store (Zero, NSEN)
Store (One, NSDO)
Store (One, NSDI)
}
}
} /* end AZHD */

2
src/southbridge/amd/pi/hudson/acpi/fch.asl
View file

@ -51,7 +51,9 @@ Device(SBUS) {
#include "usb.asl"
/* 0:14.2 - HD Audio */
#if !CONFIG_SOUTHBRIDGE_AMD_PI_KERN
#include "audio.asl"
#endif
/* 0:14.3 - LPC */
#include "lpc.asl"