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rockchip: rk3399: lower down kevin board sdram frequency to 800MHz

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we found some board not stable when sdram run 933Mhz, before we fix
it, we need to lower down the sdram frequency to 800MHz. In this patch
we modify the DQS delay from 0x280 to 0x260, extend the DQS window.

BRANCH=None
BUG=chrome-os-partner:56940
TEST=Booted Kevin.

Change-Id: I5eab6bbe96f0dae095c5353403292022e7a25421
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/382724
Commit-Ready: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
This commit is contained in:
Lin Huang 2016-09-08 11:16:26 -07:00 • committed by chrome-bot
parent d7576f6e53
commit 877a7f6ad2
2 changed files with 21 additions and 23 deletions
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4
src/mainboard/google/gru/sdram_configs.c
View file

@ -56,10 +56,8 @@ static enum dram_speeds get_sdram_index(void)
return dram_200MHz;
case 3:
return dram_666MHz_NO_ODT;
case 4:
return dram_800MHz;
default:
return dram_933MHz;
return dram_800MHz;
}
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))

40
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c
View file

@ -660,11 +660,11 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_PHY_56_DATA */
0x00000000, /* DENALI_PHY_57_DATA */
0x00000000, /* DENALI_PHY_58_DATA */
0x02800280, /* DENALI_PHY_59_DATA */
0x02800280, /* DENALI_PHY_60_DATA */
0x02800280, /* DENALI_PHY_61_DATA */
0x02800280, /* DENALI_PHY_62_DATA */
0x00000280, /* DENALI_PHY_63_DATA */
0x02600260, /* DENALI_PHY_59_DATA */
0x02600260, /* DENALI_PHY_60_DATA */
0x02600260, /* DENALI_PHY_61_DATA */
0x02600260, /* DENALI_PHY_62_DATA */
0x00000260, /* DENALI_PHY_63_DATA */
0x00000000, /* DENALI_PHY_64_DATA */
0x00000000, /* DENALI_PHY_65_DATA */
0x00000000, /* DENALI_PHY_66_DATA */
@ -788,11 +788,11 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_PHY_184_DATA */
0x00000000, /* DENALI_PHY_185_DATA */
0x00000000, /* DENALI_PHY_186_DATA */
0x02800280, /* DENALI_PHY_187_DATA */
0x02800280, /* DENALI_PHY_188_DATA */
0x02800280, /* DENALI_PHY_189_DATA */
0x02800280, /* DENALI_PHY_190_DATA */
0x00000280, /* DENALI_PHY_191_DATA */
0x02600260, /* DENALI_PHY_187_DATA */
0x02600260, /* DENALI_PHY_188_DATA */
0x02600260, /* DENALI_PHY_189_DATA */
0x02600260, /* DENALI_PHY_190_DATA */
0x00000260, /* DENALI_PHY_191_DATA */
0x00000000, /* DENALI_PHY_192_DATA */
0x00000000, /* DENALI_PHY_193_DATA */
0x00000000, /* DENALI_PHY_194_DATA */
@ -916,11 +916,11 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_PHY_312_DATA */
0x00000000, /* DENALI_PHY_313_DATA */
0x00000000, /* DENALI_PHY_314_DATA */
0x02800280, /* DENALI_PHY_315_DATA */
0x02800280, /* DENALI_PHY_316_DATA */
0x02800280, /* DENALI_PHY_317_DATA */
0x02800280, /* DENALI_PHY_318_DATA */
0x00000280, /* DENALI_PHY_319_DATA */
0x02600260, /* DENALI_PHY_315_DATA */
0x02600260, /* DENALI_PHY_316_DATA */
0x02600260, /* DENALI_PHY_317_DATA */
0x02600260, /* DENALI_PHY_318_DATA */
0x00000260, /* DENALI_PHY_319_DATA */
0x00000000, /* DENALI_PHY_320_DATA */
0x00000000, /* DENALI_PHY_321_DATA */
0x00000000, /* DENALI_PHY_322_DATA */
@ -1044,11 +1044,11 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_PHY_440_DATA */
0x00000000, /* DENALI_PHY_441_DATA */
0x00000000, /* DENALI_PHY_442_DATA */
0x02800280, /* DENALI_PHY_443_DATA */
0x02800280, /* DENALI_PHY_444_DATA */
0x02800280, /* DENALI_PHY_445_DATA */
0x02800280, /* DENALI_PHY_446_DATA */
0x00000280, /* DENALI_PHY_447_DATA */
0x02600260, /* DENALI_PHY_443_DATA */
0x02600260, /* DENALI_PHY_444_DATA */
0x02600260, /* DENALI_PHY_445_DATA */
0x02600260, /* DENALI_PHY_446_DATA */
0x00000260, /* DENALI_PHY_447_DATA */
0x00000000, /* DENALI_PHY_448_DATA */
0x00000000, /* DENALI_PHY_449_DATA */
0x00000000, /* DENALI_PHY_450_DATA */