Emulation/switch-coreboot
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add uart stuff after rebase

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Change-Id: I436ee1b4dd64304530e6eb8feea1828b518f742a
This commit is contained in:
Andre Heider 2018-02-21 16:21:09 +01:00 • committed by SwtcR
parent 7d66f71220
commit 8367824e77
1 changed files with 51 additions and 7 deletions
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58
src/mainboard/nintendo/switch/bootblock.c
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@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Andre Heider <a.heider@gmail.com>
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
@ -20,12 +21,12 @@
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/console_uart.h>
#include <soc/funitcfg.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/padconfig.h>
#include <soc/pmc.h>
#include <soc/power.h>
#include <soc/spi.h>
#include "pmic.h"
@ -42,23 +43,66 @@ static const struct funit_cfg funits[] = {
};
/********************* UART ***********************************/
static const struct pad_config uart_console_pads[] = {
static const struct pad_config uarta_pads[] = {
/* UARTA: tx, rx, rts, cts */
PAD_CFG_SFIO(UART1_TX, PINMUX_PULL_NONE, UARTA),
PAD_CFG_SFIO(UART1_RX, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTA),
PAD_CFG_SFIO(UART1_RTS, PINMUX_PULL_UP, UARTA),
PAD_CFG_SFIO(UART1_CTS, PINMUX_PULL_UP, UARTA),
PAD_CFG_SFIO(UART1_RTS, PINMUX_PULL_NONE, UARTA),
PAD_CFG_SFIO(UART1_CTS, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTA),
};
static const struct pad_config uartb_pads[] = {
/* UARTB: tx, rx, rts, cts */
PAD_CFG_SFIO(UART2_TX, PINMUX_PULL_NONE, UARTB),
PAD_CFG_SFIO(UART2_RX, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTB),
PAD_CFG_SFIO(UART2_RTS, PINMUX_PULL_NONE, UARTB),
PAD_CFG_SFIO(UART2_CTS, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTB),
};
static const struct pad_config uartc_pads[] = {
/* UARTC: tx, rx, rts, cts */
PAD_CFG_SFIO(UART3_TX, PINMUX_PULL_NONE, UARTC),
PAD_CFG_SFIO(UART3_RX, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTC),
PAD_CFG_SFIO(UART3_RTS, PINMUX_PULL_NONE, UARTC),
PAD_CFG_SFIO(UART3_CTS, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTC),
};
static const struct pad_config uartd_pads[] = {
/* UARTD: tx, rx, rts, cts */
PAD_CFG_SFIO(UART4_TX, PINMUX_PULL_NONE, UARTD),
PAD_CFG_SFIO(UART4_RX, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTD),
PAD_CFG_SFIO(UART4_RTS, PINMUX_PULL_NONE, UARTD),
PAD_CFG_SFIO(UART4_CTS, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTD),
};
void bootblock_mainboard_early_init(void)
{
soc_configure_pads(uart_console_pads, ARRAY_SIZE(uart_console_pads));
switch (console_uart_get_id()) {
case UART_ID_NONE:
case UART_ID_E:
break;
case UART_ID_A:
soc_configure_pads(uarta_pads, ARRAY_SIZE(uarta_pads));
break;
case UART_ID_B:
soc_configure_pads(uartb_pads, ARRAY_SIZE(uartb_pads));
break;
case UART_ID_C:
soc_configure_pads(uartc_pads, ARRAY_SIZE(uartc_pads));
break;
case UART_ID_D:
soc_configure_pads(uartd_pads, ARRAY_SIZE(uartd_pads));
break;
}
}
static void set_clock_sources(void)
{
/* UARTA gets PLLP, deactivate CLK_UART_DIV_OVERRIDE */
write32(CLK_RST_REG(clk_src_uarta), PLLP << CLK_SOURCE_SHIFT);
if (console_uart_get_id() == UART_ID_NONE)
return;
/* Console UART gets PLLP, deactivate CLK_UART_DIV_OVERRIDE */
write32(console_uart_clk_rst_reg(), PLLP << CLK_SOURCE_SHIFT);
}
void bootblock_mainboard_init(void)