Emulation/switch-coreboot
1
0
Fork 0
mirror of https://github.com/fail0verflow/switch-coreboot.git synced 2025-05-04 01:39:18 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

artecgroup/dbe61: Use correct interrupt router location

Browse source 
Changes the interrupt router location to what all other Geode board ports are using, and
doesn't exclusively devote any IRQs for PCI usage, as no other Geode board does so.

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

git-svn-id: svn://coreboot.org/repository/coreboot-v3@1005 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Mart Raudsepp 2008-11-12 18:26:59 +00:00
parent 705439d7aa
commit 83462e0995
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
mainboard/artecgroup/dbe61/irq_tables.h
View file

@ -46,8 +46,8 @@ const struct irq_routing_table intel_irq_routing_table = {
PIRQ_VERSION, /* u16 version */
32 + 16 * IRQ_SLOT_COUNT, /* Max. number of devices on the bus */
0x00, /* Where the interrupt router lies (bus) */
(0x12 << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x0800, /* IRQs devoted exclusively to PCI usage */
(0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
0x00, /* IRQs devoted exclusively to PCI usage */
0x1022, /* Vendor */
0x208f, /* Device */
0, /* Crap (miniport) */