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spi: Add a way to show SPI transfer speed for reads

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SPI read speed directly impacts boot time and we do quite a lot of
reading.

Add a way to easily find out the speed of SPI flash reads within
coreboot.

Write speed is less important since there are very few writes and they
are small.

BUG=chrome-os-partner:56556
BRANCH=none
TEST=run on gru with SPI_SPEED_DEBUG set to 1. See the output messages:
read SPI 627d4 7d73: 18455 us, 1740 KB/s, 13.920 Mbps

Change-Id: Iec66f5b8e3ad62f14d836a538dc7801e4ca669e7
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/376944
Commit-Ready: Julius Werner <jwerner@chromium.org>
Tested-by: Simon Glass <sjg@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Simon Glass 2016-08-27 15:03:02 -06:00 • committed by chrome-bot
parent fcf4d0ba29
commit 82cb93f6be
1 changed files with 30 additions and 0 deletions
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30
src/drivers/spi/cbfs_spi.c
View file

@ -23,14 +23,44 @@
#include <spi_flash.h>
#include <symbols.h>
#include <cbmem.h>
#include <timer.h>
static struct spi_flash *spi_flash_info;
/*
* Set this to 1 to debug SPI speed, 0 to disable it
* The format is:
*
* read SPI 62854 7db7: 10416 us, 3089 KB/s, 24.712 Mbps
*
* The important number is the last one. It should roughyly match your SPI
* clock. If it doesn't, your driver might need a little tuning.
*/
#define SPI_SPEED_DEBUG 0
static ssize_t spi_readat(const struct region_device *rd, void *b,
size_t offset, size_t size)
{
struct stopwatch sw;
bool show = SPI_SPEED_DEBUG && size >= 4*KiB;
if (show)
stopwatch_init(&sw);
if (spi_flash_info->read(spi_flash_info, offset, size, b))
return -1;
if (show) {
long usecs;
usecs = stopwatch_duration_usecs(&sw);
u64 speed; /* KiB/s */
int bps; /* Bits per second */
speed = (u64)size * 1000 / usecs;
bps = speed * 8;
printk(BIOS_DEBUG, "read SPI %#zx %#zx: %ld us, %lld KB/s, %d.%03d Mbps\n",
offset, size, usecs, speed, bps / 1000, bps % 1000);
}
return size;
}