UPSTREAM: mainboard/google/snappy: Disable unused devices

The following devices i2c6, i2c7, spi1, spi2, uart3 are not used.

BUG=none
BRANCH=master
TEST=emerge-snappy coreboot chromeos-bootimage

Change-Id: Ieda683e54696f1b9b065a60518b7f2a3c6e44bda
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 926765b11b
Original-Change-Id: I9bacdbdd194ce21686c1618494d113402f2bef6c
Original-Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Original-Reviewed-on: https://review.coreboot.org/18140
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/430714
This commit is contained in:
Wisley Chen 2017-01-14 23:19:16 +08:00 committed by chrome-bot
parent 8ec72e69f4
commit 7ac44b76c1

View file

@ -200,15 +200,15 @@ chip soc/intel/apollolake
device i2c 0x9 on end
end
end # - I2C 5
device pci 17.2 on end # - I2C 6
device pci 17.3 on end # - I2C 7
device pci 17.2 off end # - I2C 6
device pci 17.3 off end # - I2C 7
device pci 18.0 on end # - UART 0
device pci 18.1 on end # - UART 1
device pci 18.2 on end # - UART 2
device pci 18.3 on end # - UART 3
device pci 18.3 off end # - UART 3
device pci 19.0 on end # - SPI 0
device pci 19.1 on end # - SPI 1
device pci 19.2 on end # - SPI 2
device pci 19.1 off end # - SPI 1
device pci 19.2 off end # - SPI 2
device pci 1a.0 on end # - PWM
device pci 1b.0 on end # - SDCARD
device pci 1c.0 on end # - eMMC