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minor bug fix in chipset init code
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parent
ce8453cbde
commit
7997262b98
1 changed files with 6 additions and 7 deletions
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@ -280,9 +280,6 @@ doc_delay:
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jl read_next_page # no, read next page
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jl read_next_page # no, read next page
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sis730ipl_end:
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sis730ipl_end:
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movb $0x77, %al
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outb %al,$0x80
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jmp spl_vector # jump to SPL vector
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jmp spl_vector # jump to SPL vector
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/* ------------------------------------------------------------------------------------------*/
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/* ------------------------------------------------------------------------------------------*/
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@ -381,9 +378,10 @@ pci_init_table:
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# High Byte -> Register Low Byte -> Value
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# High Byte -> Register Low Byte -> Value
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#include "dll.inc"
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#include "dll.inc"
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.word 0x0407 # Turn on Bus Master, Memory/IO Space
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.word 0x5280 #
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.word 0x5280 # Set Memory Connamd Output Timming to Delay 1T
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.word 0x0407 # Turn on Bus Master
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.word 0x5680 # Precharge
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.word 0x5680 # Precharge
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.word 0x5640 # Mode Register Set
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.word 0x5640 # Mode Register Set
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@ -391,9 +389,10 @@ pci_init_table:
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.word 0x5620 # Refresh
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.word 0x5620 # Refresh
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.word 0x5620 # Refresh
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.word 0x5620 # Refresh
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.byte 0x5601 # CAS = 3T
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.word 0x50c5 # Refresh Cycle Enable
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.word 0x50c5 # Refresh Cycle Enable
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#.byte 0x5601 # CAS = 3T
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.word 0x0000 /* Null, End of table */
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.word 0x0000 /* Null, End of table */
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.org 0x01f0
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.org 0x01f0
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